求个STM32F207的串口的测试程序啊

霹雳 · 发表于 2016-7-27 08:34:52

如题求个实测能用的串口发送接收程序~~~~~~~~~~~~~~~~~~~~~~~

xuande · 发表于 2016-7-27 08:34:53

这是以前用F205做的产品，串口初始化部分。
F207没用过，但可以断定是一样的。

[mw_shl_code=applescript,true]/*--------------------------------------------*/
//Configure USART1, 9600baud, 1-bit start, 8-bit data, 1-bit stop, no parity.
RCC -> AHB1ENR |= 0x00000001; //Enable clock of GPIOA.
RCC -> APB2ENR |= 0x00000010; //Enable clock of USART1.
GPIOA -> MODER |= 0x00280000; //PA10, PA9 as AF.
GPIOA -> AFR[1] |= 0x00000770; //PA10, PA9 as AF7.

USART1 -> BRR = 0x0000186A; // BRR = 60MHz / (2*8*9600).
// NOTE: the clock frequency of APB2 is different from APB1!
USART1 -> CR1 |= 0x0000200C; //oversampling by 16; Enable USART.
// enable Tx; enable Rx.

i=USART1 -> SR; //Software sequence to clear hardware flags, then avoid the 1st interrupt.
i=USART1 -> DR;
USART1 -> DR = i;

for ( i=0; i<5; i++ )
{ //waiting until the USART is ready.
if ( USART1 -> SR & 0x00000040 )
{ i=5; }
else
{ i=0; }
}
USART1 -> SR &= 0xFFFFFFBF;

USART1 -> CR1 |= 0x00000060; //Enable TCIE and RXNEIE.
/*--------------------------------------------*/
//Configure USART2, 9600baud, 1-bit start, 8-bit data, 1-bit stop, no parity.
RCC -> AHB1ENR |= 0x00000001; //Enable clock of GPIOA.
RCC -> APB1ENR |= 0x00020000; //Enable clock of USART2.
GPIOA -> MODER |= 0x000000A0; //PA3, PA2 as AF.
GPIOA -> AFR[0] |= 0x00007700; //PA3, PA2 as AF7.

USART2 -> BRR = 0x00000C35; // BRR = 30MHz / (2*8*9600).
USART2 -> CR1 |= 0x0000200C; //oversampling by 16; Enable USART.
// enable Tx; enable Rx.

i=USART2 -> SR; //Software sequence to clear hardware flags, then avoid the 1st interrupt.
i=USART2 -> DR;
USART2 -> DR = i;

for ( i=0; i<5; i++ )
{ //waiting until the USART is ready.
if ( USART2 -> SR & 0x00000040 )
{ i=5; }
else
{ i=0; }
}
USART2 -> SR &= 0xFFFFFFBF;

USART2 -> CR1 |= 0x00000060; //Enable TCIE and RXNEIE.
/*--------------------------------------------*/
//Configure USART3, 9600baud, 1-bit start, 8-bit data, 1-bit stop, no parity.
RCC -> AHB1ENR |= 0x00000002; //Enable clock of GPIOB.
RCC -> APB1ENR |= 0x00040000; //Enable clock of USART3.
GPIOB -> MODER |= 0x00A00000; //PB11, PB10 as AF.
GPIOB -> AFR[1] |= 0x00007700; //PB11, PB10 as AF7.

USART3 -> BRR = 0x00000C35; // BRR = 30MHz / (2*8*9600).
USART3 -> CR1 |= 0x0000200C; //oversampling by 16; Enable USART.
// enable Tx; enable Rx.

i=USART3 -> SR; //Software sequence to clear hardware flags, then avoid the 1st interrupt.
i=USART3 -> DR;
USART3 -> DR = i;

for ( i=0; i<5; i++ )
{ //waiting until the USART is ready.
if ( USART3 -> SR & 0x00000040 )
{ i=5; }
else
{ i=0; }
}
USART3 -> SR &= 0xFFFFFFBF;

USART3 -> CR1 |= 0x00000060; //Enable TCIE and RXNEIE.
/*--------------------------------------------*/
//Configure UART4, 9600baud, 1-bit start, 8-bit data, 1-bit stop, no parity.
RCC -> AHB1ENR |= 0x00000001; //Enable clock of GPIOA.
RCC -> APB1ENR |= 0x00080000; //Enable clock of USART4.
GPIOA -> MODER |= 0x00000002; //PA0 as AF.
GPIOA -> AFR[0] |= 0x00000008; //PA0 as AF8.

UART4 -> BRR = 0x00000C35; // BRR = 30MHz / (2*8*9600).
UART4 -> CR1 |= 0x00002008; //oversampling by 16; Enable USART.
// enable Tx only.

i=UART4 -> SR; //Software sequence to clear hardware flags, then avoid the 1st interrupt.
i=UART4 -> DR;
UART4 -> DR = i;

for ( i=0; i<5; i++ )
{ //waiting until the USART is ready.
if ( UART4 -> SR & 0x00000040 )
{ i=5; }
else
{ i=0; }
}
UART4 -> SR &= 0xFFFFFFBF;

UART4 -> CR1 |= 0x00000040; //Enable TCIE only.
/*--------------------------------------------*/
[/mw_shl_code]