int test_tim0_down()
{
int loop = 10;
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 60010;
HS_TIM0 -> CR1 = 0x11;
while(!(HS_TIM0 -> SR & 1));
while(loop--);
return (HS_TIM0 -> CNT < 60010 && HS_TIM0 -> CNT > 10005);
}
int test_tim0_arr_buffrerd()
{
int test_big_down = 0, test_small_down = 0, loop = 10;
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 60010;
HS_TIM0 -> CR1 = 0x11;
while(!(HS_TIM0 -> SR & 1));
HS_TIM0 -> SR = 0;
while(loop--);
test_big_down = (HS_TIM0 -> CNT < 60010 && HS_TIM0 -> CNT > 10000);
HS_TIM0 -> CR1 |= 0x0080;
HS_TIM0 -> ARR = 600;
while(!(HS_TIM0 -> SR & 1));
test_small_down = (HS_TIM0 -> CNT < 600);
return test_small_down && test_big_down;
}
int test_tim0_updata_source()
{
HS_TIM0 -> CR1 = 4;
HS_TIM0 -> EGR = 1;
while(HS_TIM0 -> SR & 1){
return 0;
}
return 1;
}
int test_tim0_mid_one()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 60000;
HS_TIM0 -> CR1 |= 0x0020;
HS_TIM0 -> CCR[0] = 50000;
HS_TIM0 -> CR1 |= 0x0001;
while(!(HS_TIM0 -> SR & 2));
return HS_TIM0 -> CR1 & 0x10;
}
int test_tim0_mid_two()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 60000;
HS_TIM0 -> CR1 |= 0x0040;
HS_TIM0 -> CCR[0] = 50000;
HS_TIM0 -> CR1 |= 0x0001;
while(!(HS_TIM0 -> SR & 2));
return !(HS_TIM0 -> CR1 & 0x10);
}
int test_tim0_mid_three()
{
int flag = 0;
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 60000;
HS_TIM0 -> CR1 |= 0x0060;
HS_TIM0 -> CCR[0] = 30000;
HS_TIM0 -> CR1 |= 0x0001;
while(!(HS_TIM0 -> SR & 2));
flag = !(HS_TIM0 -> CR1 & 0x10);
HS_TIM0 -> SR &= 0x0d;
while(!(HS_TIM0 -> SR & 2));
return flag && (HS_TIM0 -> CR1 & 0x10);
}
int test_tim0_repeat_up()//手动测试大约10S
{
HS_TIM0 -> PSC = 16000;
HS_TIM0 -> ARR = 5000;
HS_TIM0 -> RCR = 1;
HS_TIM0 -> EGR = 1;
while(!(HS_TIM0 -> SR & 1));
HS_TIM0 -> SR = 0;
HS_TIM0 -> CR1 = 1;
while(!(HS_TIM0 -> SR & 1));
return 1;
}
void test_tim0_OCM_001()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 5000;
HS_TIM0 -> CCR[0] = 2500;
HS_TIM0 -> CCR[1] = 2500;
HS_TIM0 -> CCR[2] = 2500;
HS_TIM0 -> CCR[3] = 2500;
HS_TIM0 -> CCMR1 |= 0x6060;
HS_TIM0 -> CCMR2 |= 0x6060;
HS_TIM0 -> CCER |= 0x1111;
HS_TIM0 -> BDTR |= 0x8000;
HS_TIM0 -> CR1 = 1;
chThdSleepSeconds(3);
HS_TIM0 -> CCMR1 = 0x1010;
HS_TIM0 -> CCMR2 = 0x1010;
}
void test_tim0_OCM_010()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 5000;
HS_TIM0 -> CCR[0] = 2500;
HS_TIM0 -> CCR[1] = 2500;
HS_TIM0 -> CCR[2] = 2500;
HS_TIM0 -> CCR[3] = 2500;
HS_TIM0 -> CCMR1 |= 0x6060;
HS_TIM0 -> CCMR2 |= 0x6060;
HS_TIM0 -> CCER |= 0x1111;
HS_TIM0 -> BDTR |= 0x8000;
HS_TIM0 -> CR1 = 1;
chThdSleepSeconds(3);
HS_TIM0 -> CCMR1 = 0x2020;
HS_TIM0 -> CCMR2 = 0x2020;
}
void test_tim0_OCM_011()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 5000;
HS_TIM0 -> CCR[0] = 2500;
HS_TIM0 -> CCR[1] = 2500;
HS_TIM0 -> CCR[2] = 2500;
HS_TIM0 -> CCR[3] = 2500;
HS_TIM0 -> CCMR1 |= 0x1010;
HS_TIM0 -> CCMR2 |= 0x1010;
HS_TIM0 -> CCER |= 0x1111;
HS_TIM0 -> BDTR |= 0x8000;
HS_TIM0 -> CR1 = 1;
chThdSleepSeconds(3);
HS_TIM0 -> CCMR1 = 0x3030;
HS_TIM0 -> CCMR2 = 0x3030;
}
void test_tim0_OCM_100()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 5000;
HS_TIM0 -> CCR[0] = 2500;
HS_TIM0 -> CCR[1] = 2500;
HS_TIM0 -> CCR[2] = 2500;
HS_TIM0 -> CCR[3] = 2500;
HS_TIM0 -> CCMR1 |= 0x6060;
HS_TIM0 -> CCMR2 |= 0x6060;
HS_TIM0 -> CCER |= 0x1111;
HS_TIM0 -> BDTR |= 0x8000;
HS_TIM0 -> CR1 = 1;
chThdSleepSeconds(3);
HS_TIM0 -> CCMR1 = 0x4040;
HS_TIM0 -> CCMR2 = 0x4040;
}
void test_tim0_six_step_pwm()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> CR2 = 1;
HS_TIM0 -> CCER |= 0x555;
HS_TIM0 -> BDTR |= 0x8000;
while(1){
//ONE
HS_TIM0 -> CCMR1 = 0x4050;
HS_TIM0 -> CCMR2 = 0x0050;
test_tim0_one_pluse_delay(160);
while(!(HS_TIM0 -> SR & 1));
HS_TIM0 -> EGR |= 0x0020;
HS_TIM0 -> SR = 0;
//TWO
HS_TIM0 -> CCMR1 = 0x4050;
HS_TIM0 -> CCMR2 = 0x0040;
test_tim0_one_pluse_delay(160);
while(!(HS_TIM0 -> SR & 1));
HS_TIM0 -> EGR |= 0x0020;
HS_TIM0 -> SR = 0;
//THREE
HS_TIM0 -> CCMR1 = 0x5050;
HS_TIM0 -> CCMR2 = 0x0040;
test_tim0_one_pluse_delay(160);
while(!(HS_TIM0 -> SR & 1));
HS_TIM0 -> EGR |= 0x0020;
HS_TIM0 -> SR = 0;
//FOUR
HS_TIM0 -> CCMR1 = 0x5040;
HS_TIM0 -> CCMR2 = 0x0040;
test_tim0_one_pluse_delay(160);
while(!(HS_TIM0 -> SR & 1));
HS_TIM0 -> EGR |= 0x0020;
HS_TIM0 -> SR = 0;
//FIVE
HS_TIM0 -> CCMR1 = 0x5040;
HS_TIM0 -> CCMR2 = 0x0050;
test_tim0_one_pluse_delay(160);
while(!(HS_TIM0 -> SR & 1));
HS_TIM0 -> EGR |= 0x0020;
HS_TIM0 -> SR = 0;
//SIX
HS_TIM0 -> CCMR1 = 0x4040;
HS_TIM0 -> CCMR2 = 0x0050;
test_tim0_one_pluse_delay(160);
while(!(HS_TIM0 -> SR & 1));
HS_TIM0 -> EGR |= 0x0020;
HS_TIM0 -> SR = 0;
}
}
int test_tim0_XOR_reset()
{
//tim1 cc1 pwm -_- tim0 cc1 cc2 cc3 XOR
HS_TIM1 -> PSC = 100;
HS_TIM1 -> ARR = 10000;
HS_TIM1 -> CCR[3] = 5000;
HS_TIM1 -> CCMR2 |= 0x6000;
HS_TIM1 -> CCER = 0x1000;
HS_TIM1 -> BDTR = 0x8000;
HS_TIM0 -> PSC = 100;
HS_TIM0 -> CR2 |= 0x0080;
HS_TIM0 -> CCMR1 |= 0x0101;
HS_TIM0 -> CCMR2 |= 0x0001;
HS_TIM0 -> SMCR |=0x0044;
HS_TIM0 -> ARR |= 0xffff;
HS_TIM0 -> CR1 = 1;
HS_TIM1 -> CR1 = 1;
while(!(HS_TIM1 -> SR & 1));
chThdSleepMilliseconds(1);//软件和硬件是并行关系,所以需要等待硬件反应。
return HS_TIM0 -> CNT < 1000;
}
int test_tim0_XOR_gated()
{
int test_num = 0;
//tim1 cc1 pwm _-_ tim0 cc1 cc2 cc3 XOR
//tim0 cc1 cc2 high
HS_TIM1 -> PSC = 100 ;
HS_TIM1 -> ARR = 10000;
HS_TIM1 -> CCR[0] = 5000;
HS_TIM1 -> CCMR1 |= 0x60;
HS_TIM1 -> CCER = 1;
HS_TIM1 -> BDTR = 0x8000;
HS_TIM1 -> CR1 = 9;
HS_TIM0 -> PSC = 100;
HS_TIM0 -> CR2 |= 0x0080;
HS_TIM0 -> CCMR1 |= 0x0101;
HS_TIM0 -> CCMR2 |= 0x0001;
HS_TIM0 -> SMCR |=0x0045;
HS_TIM0 -> ARR |= 0xffff;
while(!(HS_TIM1 -> SR & 1));
test_num = HS_TIM0 -> CNT;
chThdSleepMilliseconds(2);
return test_num == HS_TIM0 -> CNT;
}
int test_tim0_XOR_trigger()
{
//tim1 cc1 pwm _-_ tim0 cc1 cc2 cc3 XOR
//tim0 cc1 cc2 high
HS_TIM1 -> PSC = 0;
HS_TIM1 -> ARR = 10000;
HS_TIM1 -> CCR[0] = 5000;
HS_TIM1 -> CCMR1 |= 0x60;
HS_TIM1 -> CCER = 1;
HS_TIM1 -> BDTR = 0x8000;
HS_TIM1 -> CR1 = 9;
HS_TIM0 -> PSC = 100;
HS_TIM0 -> CR2 |= 0x0080;
HS_TIM0 -> CCMR1 |= 0x0101;
HS_TIM0 -> CCMR2 |= 0x0001;
HS_TIM0 -> SMCR |=0x0046;
HS_TIM0 -> ARR |= 0xffff;
while(!(HS_TIM1 -> SR & 1));
return HS_TIM0 -> CNT != 0;
}
void test_tim0_dead_pwm()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 999;
HS_TIM0 -> CCR[0] = 500;
HS_TIM0 -> CCR[1] = 500;
HS_TIM0 -> CCR[2] = 500;
HS_TIM0 -> CCR[3] = 500;
HS_TIM0 -> CCMR1 |= 0x6060;
HS_TIM0 -> CCMR2 |= 0x6060;
HS_TIM0 -> CCER |= 0x5555;
HS_TIM0 -> BDTR |= 0x8080;
HS_TIM0 -> CR1 = 1;
}
int test_tim0_clear_ocref()
{
HS_TIM0 -> PSC = 0;
HS_TIM0 -> ARR = 5000;
HS_TIM0 -> CCR[0] = 2500;
HS_TIM0 -> CCR[1] = 2500;
HS_TIM0 -> CCR[2] = 2500;
HS_TIM0 -> CCR[3] = 2500;
HS_TIM0 -> CCMR1 |= 0xe0e0;
HS_TIM0 -> CCMR2 |= 0xe0e0;
HS_TIM0 -> CCER |= 0x5555;
HS_TIM0 -> BDTR |= 0x8000;
HS_TIM0 -> CR1 |= 0x01;
return 1;
}
int test_tim0_encoder_mode1()
{
//tim1 and tim2 pwm
test_tim1_pwm();
test_tim0_one_pluse_delay(250);
while(!(HS_TIM0 -> SR & 0x0001));
tim0_remove();
test_tim2_pwm();
//tim0 encoder
HS_TIM0 -> ARR = 65530;
HS_TIM0 -> CCMR1 |= 0x0101;
HS_TIM0 -> SMCR |= 0x0001;
HS_TIM0 -> CR1 |= 0x00001;
while(!(HS_TIM0 -> CNT > 0));
return 1;
}
int test_tim0_padmux_pwm_and_capture()//_-_
{
HS_TIM0 -> PSC = 1600;
HS_TIM0 -> ARR = 50000;
HS_TIM0 -> CCR[0] = 25000;
HS_TIM0 -> CCR[1] = 25000;
HS_TIM0 -> CCR[2] = 25000;
HS_TIM0 -> CCMR1 |= 0x7070;
HS_TIM0 -> CCMR2 |= 0x0170;
HS_TIM0 -> CCER |= 0x5555;
HS_TIM0 -> BDTR |= 0x8000;
HS_TIM0 -> CR1 = 1;
while(!(HS_TIM0 -> SR & 0x0010));
return HS_TIM0 -> CCR[3] = 25000;
}