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FMC的GPIO配置
[mw_shl_code=c,true]/****************************************Copyright (c)**************************************************
** This file is part of RT-Thread RTOS
** COPYRIGHT (C) 2006 - 2014, RT-Thread Development Team
**
** The license and distribution terms for this file may be
** found in the file LICENSE in this distribution or at
** http://www.rt-thread.org/license/LICENSE
********************************************************************************************************/
static const struct {
GPIO_TypeDef *GPIOx;
uint16_t PinSource;
} _fmc_conf[] = {
/* D0~D7 */
{GPIOD, 14}, // D0
{GPIOD, 15}, // D1
{GPIOD, 0}, // D2
{GPIOD, 1}, // D3
{GPIOE, 7}, // D4
{GPIOE, 8}, // D5
{GPIOE, 9}, // D6
{GPIOE, 10}, // D7
/* D8~D15 */
{GPIOE, 11}, // D8
{GPIOE, 12}, // D9
{GPIOE, 13}, // D10
{GPIOE, 14}, // D11
{GPIOE, 15}, // D12
{GPIOD, 8}, // D13
{GPIOD, 9}, // D14
{GPIOD, 10}, // D15
/* A0~A23 */
{GPIOF, 0}, // A0
{GPIOF, 1}, // A1
{GPIOF, 2}, // A2
{GPIOF, 3}, // A3
{GPIOF, 4}, // A4
{GPIOF, 5}, // A5
{GPIOF, 12}, // A6
{GPIOF, 13}, // A7
{GPIOF, 14}, // A8
{GPIOF, 15}, // A9
{GPIOG, 0}, // A10
{GPIOG, 1}, // A11
{GPIOG, 2}, // A12
{GPIOG, 3}, // A13
{GPIOG, 4}, // A14
{GPIOG, 5}, // A15
{GPIOD, 11}, // A16
{GPIOD, 12}, // A17
{GPIOD, 13}, // A18
{GPIOE, 3}, // A19
{GPIOE, 4}, // A20
{GPIOE, 5}, // A21
{GPIOE, 6}, // A22
{GPIOE, 2}, // A23
/* CLK */
{GPIOD, 3}, // CLK
{GPIOB, 7}, // NL
/* R/W */
{GPIOD, 4}, // NOE
{GPIOD, 5}, // NWE
{GPIOD, 6}, // NWAIT
/* CS */
{GPIOD, 7}, // NE1
{GPIOG, 9}, // NE2
{GPIOG, 10}, // NE3
{GPIOG, 12}, // NE4
{GPIOE, 0}, // NBL0
{GPIOE, 1}, // NBL1
{GPIOF, 11}, // SDNRAS
{GPIOG, 8}, // SDCLK
};
static void _do_conf_fmc(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource)
{
GPIO_InitTypeDef gps;
gps.GPIO_Mode = GPIO_Mode_AF;
gps.GPIO_Speed = GPIO_Speed_100MHz;
gps.GPIO_OType = GPIO_OType_PP;
gps.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_PinAFConfig(GPIOx, GPIO_PinSource, GPIO_AF_FMC);
gps.GPIO_Pin = (1 << GPIO_PinSource); // GPIO_Pin
GPIO_Init(GPIOx, &gps);
}
void fsmc_gpio_init(void)
{
int i;
/* Enable GPIOs clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE | RCC_AHB1Periph_GPIOF |
RCC_AHB1Periph_GPIOG, ENABLE);
/* Enable FMC clock */
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FMC, ENABLE);
for (i = 0; i < sizeof(_fmc_conf)/sizeof(_fmc_conf[0]); i++)
{
_do_conf_fmc(_fmc_conf.GPIOx, _fmc_conf.PinSource);
}
}
[/mw_shl_code]
SRAM的BANK配置
[mw_shl_code=c,true]
[mw_shl_code=c,true]/****************************************Copyright (c)**************************************************
** This file is part of RT-Thread RTOS
** COPYRIGHT (C) 2006 - 2014, RT-Thread Development Team
**
** The license and distribution terms for this file may be
** found in the file LICENSE in this distribution or at
** http://www.rt-thread.org/license/LICENSE
********************************************************************************************************/[/mw_shl_code]
#include "rtthread.h"
#include "board.h"
void ext_sram_init(void)
{
FMC_NORSRAMInitTypeDef FMC_NORSRAMInitStructure;
FMC_NORSRAMTimingInitTypeDef Timing_read,Timing_write;
FMC_NORSRAMInitStructure.FMC_ReadWriteTimingStruct = &Timing_read;
FMC_NORSRAMInitStructure.FMC_WriteTimingStruct = &Timing_write;
FMC_NORSRAMStructInit(&FMC_NORSRAMInitStructure);
/* TODO: mem_test passed but need more tuning. */
/*--------------------- read timings configuration ---------------------*/
Timing_read.FMC_AddressSetupTime = 0x1; /* [3:0] F2/F4 1~15 HCLK */
Timing_read.FMC_AddressHoldTime = 0x2; /* Don’t care in SRAM mode. */
Timing_read.FMC_DataSetupTime = 0xA; /* [15:8] F2/F4 0~255 HCLK */
/* [19:16] Time between NEx high to NEx low (BUSTURN HCLK) */
Timing_read.FMC_BusTurnAroundDuration = 0x2;
Timing_read.FMC_CLKDivision = 0x2; /* Don’t care in SRAM mode. */
Timing_read.FMC_DataLatency = 0x1; /* Don’t care in SRAM mode. */
Timing_read.FMC_AccessMode = FMC_AccessMode_A;
/*--------------------- write timings configuration ---------------------*/
Timing_write.FMC_AddressSetupTime = 0x0; /* [3:0] F2/F4 1~15 HCLK */
Timing_write.FMC_AddressHoldTime = 0x1; /* Don’t care in SRAM mode. */
Timing_write.FMC_DataSetupTime = 0x4; /* [15:8] F2/F4 0~255 HCLK */
/* [19:16] Time between NEx high to NEx low (BUSTURN HCLK) */
Timing_write.FMC_BusTurnAroundDuration = 0x1;
Timing_write.FMC_CLKDivision = 0x1; /* Don’t care in SRAM mode. */
Timing_write.FMC_DataLatency = 0; /* Don’t care in SRAM mode. */
Timing_write.FMC_AccessMode = FMC_AccessMode_A; /* FSMC AccessMode */
/* Reset NOR/SRAM Init structure parameters values */
/*-------------------------- SRAM configuration --------------------------*/
FMC_NORSRAMInitStructure.FMC_DataAddressMux = FMC_DataAddressMux_Enable;
FMC_NORSRAMInitStructure.FMC_MemoryType = FMC_MemoryType_PSRAM;
FMC_NORSRAMInitStructure.FMC_MemoryDataWidth = FMC_NORSRAM_MemoryDataWidth_16b;
FMC_NORSRAMInitStructure.FMC_BurstAccessMode = FMC_BurstAccessMode_Disable;
FMC_NORSRAMInitStructure.FMC_AsynchronousWait = FMC_AsynchronousWait_Disable;
FMC_NORSRAMInitStructure.FMC_WaitSignalPolarity = FMC_WaitSignalPolarity_Low;
FMC_NORSRAMInitStructure.FMC_WrapMode = FMC_WrapMode_Disable;
FMC_NORSRAMInitStructure.FMC_WaitSignalActive = FMC_WaitSignalActive_BeforeWaitState;
FMC_NORSRAMInitStructure.FMC_WriteOperation = FMC_WriteOperation_Enable;
FMC_NORSRAMInitStructure.FMC_WaitSignal = FMC_WaitSignal_Disable;
FMC_NORSRAMInitStructure.FMC_ExtendedMode = FMC_ExtendedMode_Disable;
FMC_NORSRAMInitStructure.FMC_WriteBurst = FMC_WriteBurst_Disable;
FMC_NORSRAMInitStructure.FMC_ContinousClock = FMC_CClock_SyncOnly;
/*------------------------------ SRAM init ------------------------------*/
FMC_NORSRAMInitStructure.FMC_Bank = FMC_Bank1_NORSRAM1;
FMC_NORSRAMInit(&FMC_NORSRAMInitStructure);
FMC_NORSRAMCmd(FMC_NORSRAMInitStructure.FMC_Bank, ENABLE);
}
[/mw_shl_code]
代码就是这样，建议使用代码对比工具查看。
如果还有问题，建议也先检查一下硬件。
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( 粤ICP备12000418号-1 )
发表于 2014-10-29 16:36:57
楼主
发表于 2014-10-29 17:01:58
