写了个stm8l52c6 的block读写代码,用的是IAR.按照官方提示步骤更改过RAM方面的配置: - For IAR Compiler: 1- Define a location FLASH_CODE before each code function by the mean of " #pragma location = "FLASH_CODE"". This location is defined in the stm8l15x_flash.c file, and it's conditionned by IAR_RAM_EXECUTION definifition. 2- Uncomment the "#define IAR_RAM_EXECUTION (1)" line in the stm8l15x.h file, or define it in IAR compiler preprocessor to enable the FLASH_CODE location definition. 3- Edit the linker file lnkstm8l15xxx.icf available under "$\IAR Systems\Embedded Workbench 6.0\stm8\config\lnkstm8l15xxx.icf" by updating the line "initialize by copy { rw, ro section .tiny.rodata };" with the the following one: "initialize by copy { rw, ro section .tiny.rodata, section FLASH_CODE};". 4- The speed optimization is required to ensure proper execution from RAM. -> In IAR Embedded workbench IDE Select Project\Options\C/C++ Compiler\Optimizations select speed optimization
代码如下:
#pragma location="MY_RAM_FUNC"
void LPR_Ram(void)
{
uint8_t i = 0;
/* To reduce consumption to minimal
Swith off the Flash */
FLASH->CR1 = 0x08;
while(((CLK->REGCSR)&0x80)==0x80);
/* Swith off the Regulator*/
CLK->REGCSR = 0x02;
while(((CLK->REGCSR)&0x01)==0x01);
/* Set trigger on GPIOE pin6*/
WFE->CR2 = 0x04;
GPIOE->CR2 = 0x44;
for (i=0; i<100; i++);
/* To start counter on falling edge*/
// GPIO_LOW(CTN_GPIO_PORT,CTN_CNTEN_GPIO_PIN);
/*Wait for end of counter */
wfe();
EXTI->SR1 |= 0x40;
WFE->CR2 = 0x00;
//Switch on the regulator
CLK->REGCSR = 0x00;
while(((CLK->REGCSR)&0x1) != 0x1);
}
运行之后
Error[Lc036]: no block or place matches the pattern "ro code section MY_RAM_FUNC_init in lowpower.o"
Error[Lc036]: no block or place matches the pattern "rw code section MY_RAM_FUNC in lowpower.o"