求助vitis2023.1系统工程编译出错。。。

MrsTao

在进行vitis第一个例程"hello world"实验时，出现系统工程编译出错。硬件平台工程和应用工程编译都是正确的，求高手指点。。。

vitis2023.1版本

出错信息如下：

10:13:15 **** Incremental Build of configuration Debug for project hello_world_system ****
make all
Generating bif file for the system project
generate_system_bif.bat 61732 E:/ZYNQ/Embeded_Vitis/hello_wold/vitis/system_wrapper/export/system_wrapper/system_wrapper.xpfm standalone_ps7_cortexa9_0 E:/ZYNQ/Embeded_Vitis/hello_wold/vitis/hello_world_system/Debug/system.bif
sdcard_gen --xpfm E:/ZYNQ/Embeded_Vitis/hello_wold/vitis/system_wrapper/export/system_wrapper/system_wrapper.xpfm --sys_config system_wrapper --bif E:/ZYNQ/Embeded_Vitis/hello_wold/vitis/hello_world_system/Debug/system.bif --no_bitstream --elf E:/ZYNQ/Embeded_Vitis/hello_wold/vitis/hello_world/Debug/hello_world.elf,ps7_cortexa9_0
Error intializing SD boot data : Software platform XML error, sdx:bif value "child killed: unknown signal" path does not exist E:/ZYNQ/Embeded_Vitis/hello_wold/vitis/system_wrapper/export/system_wrapper/child killed: unknown signal/child killed: unknown signal, platform path E:/ZYNQ/Embeded_Vitis/hello_wold/vitis/system_wrapper/export/system_wrapper, sdx:configuration system_wrapper, sdx:image child killed: unknown signal
make: *** [makefile:36: package] Error 1

10:13:17 Build Finished (took 2s.338ms)

caojunye

有可能是软件bug，可以重新创建Vitis工程试试