自定义ip和原来的模块不在一个system下

zplovesusu1

本人的开发板是zynq7000，ADRV9009的AD，购买时厂家已经将PL部分搭建好了，数据经过AD后通过滤波器，然后packed fifo进入AXI_DMA，然后通过HP口进入ZYNQ，我现在是想将收到的信号读取出来，按照网上教程可以bram和DDR读取，我尝试了BRAM，将信号通过自己创建的PL_BRAM_CRTL_0到BRAM生成器，再通过AXI_BRAM_crtl将数据通过GP0口传到ZYNQ中，但同步时报错，主要有如下几个问题：
1 [IP_Flow 19-3461] Value '268451840' is out of the range for parameter 'Memory Depth(MEM_DEPTH)' for BD Cell 'axi_bram_ctrl_0' . Valid values are - 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072, 262144, 524288, 1048576, 2097152, 4194304, 8388608, 16777216, 33554432, 67108864, 134217728, 268435456, 536870912, 1073741824
2  [BD 41-703] Peripheral </pl_bram_ctrl_0/S00_AXI/S00_AXI_reg> is mapped into master segment </sys_ps7/Data/SEG_pl_bram_ctrl_0_S00_AXI_reg>, but there is no path between them. This is usually because an interconnect between the master and the peripheral has become misconfigured. Check and reconfigure the interconnect, or delete the master segment.
3 [BD 41-703] Peripheral </axi_bram_ctrl_0/S_AXI/Mem0> is mapped into master segment </axi_adrv9009_dacfifo/axi/SEG_axi_bram_ctrl_0_Mem0>, but there is no path between them. This is usually because an interconnect between the master and the peripheral has become misconfigured. Check and reconfigure the interconnect, or delete the master segment.

我个人认为是这几个文件不在system里导致的，因为第一个问题，我修改了容量，但还是报错。请问各位大佬如何将这几个ip放在system中呢

日渐秃兀

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QinQZ

看提示像是存储深度，以及一些IP核之间的连线有问题