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初级会员 
 
	积分199金钱199 注册时间2016-1-27在线时间18 小时 | 
 
| 1.硬件上连接,LED0 <--> PI0    LED1 <--> PF3 2.修改设备树,由于板子出厂自带的程序是有点亮 led 的,所以一般来说设备树有相关节点,
 根据板子开机 Log 可以知道板子使用的设备树是 stm32mp157d-atk.dts
 
 假设当前在 kernel 源码
 vi arch/arm/boot/dts/stm32mp157d-atk.dts
 因为 LED0 接的是 PI0 ,所以直接搜索 gpioi 0,或者搜索 led
 
 结果是没有在 stm32mp157d-atk.dts 找到,在文件开头可以看到 include 其他 dts 文件,可以一个一个打开,继续搜索
 
 经过一番搜索,在 stm32mp157.dtsi 找到以下节点
 
 leds {
 compatible = "gpio-leds";
 
 led1 {
 label = "sys-led";
 gpios = <&gpioi 0 GPIO_ACTIVE_LOW>;
 linux,default-trigger = "heartbeat";
 default-state = "on";
 status = "okay";
 };
 
 led2 {
 label = "user-led";
 gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
 linux,default-trigger = "none";
 default-state = "on";
 status = "okay";
 };
 
 beep {
 label = "beep";
 gpios = <&gpioc 7 GPIO_ACTIVE_LOW>;
 default-state = "off";
 };
 };
 
 
 其中 led1 led2 这两个节点就是我们关注的,可以直接注释掉,或者将 status 属性的值从 okay 改为 disabled
 
 改完设备树之后 可以通过  make dtbs 重新编译,然后下载到板子中
 
 3.打开 stm32mp157 的参考手册,主要关注以下寄存器
 
 RCC_PLL4CR(RCC PLL4 Control Register)  物理地址 0x50000000 + 0x894
 设置该寄存器打开 PLL4,PLL4 是 gpio 等相关外设的时钟源
 这里主要最低两位
 [1] Bit 1 PLL4RDY: PLL4 clock ready flag
 Set by hardware to indicate that the PLL4 is locked.
 0: PLL4 unlocked (default after reset)
 1: PLL4 locked
 [0] Bit 0 PLLON: PLL4 enable
 Set and cleared by software to enable the PLL4.
 0: PLL4 OFF (default after reset)
 1: PLL4 ON, and ref4_ck is provided to the PLL4
 
 RCC_MP_AHB4ENSETR(RCC AHB4 Periph. Enable For MPU Set Register)  物理地址 0x50000000 + 0xA28
 设置该寄存器可以打开 gpio 的时钟,比如设置 GPIOI 和 GPIOF 的位如下
 [8] Bit 8 GPIOIEN: GPIOI peripheral clocks enable
 Set by software.
 0: Writing '0' has no effect, reading '0' means that the peripheral clocks are disabled
 1: Writing '1' enables the peripheral clocks, reading '1' means that the peripheral clocks are enabled
 [5] Bit 5 GPIOFEN: GPIOF peripheral clocks enable
 Set by software.
 0: Writing '0' has no effect, reading '0' means that the peripheral clocks are disabled
 1: Writing '1' enables the peripheral clocks, reading '1' means that the peripheral clocks are enabled
 
 GPIOx_MODER(GPIO port mode register)
 (x = A to K, Z)
 这些寄存器(GPIOA_MODER to GPIOK_MODER,GPIOZ_MODER)用于设置 GPIO 输出输入模式,同时也表明了
 相应的引脚为 GPIO 功能。
 
 GPIOI_MODER  物理地址 0x5000A000 + 0x00
 设置 GPIOI 相关引脚的模式,位定义如下,对于 PI0 关注 [1:0]
 Bits 31:0 MODER[15:0][1:0]: Port x configuration I/O pin y (y = 15 to 0)
 These bits are written by software to configure the I/O mode.
 00: Input mode
 01: General purpose output mode
 10: Alternate function mode
 11: Analog mode
 
 GPIOF_MODER  物理地址 0x50007000 + 0x00
 设置 GPIOF 相关引脚的模式,未定义同上,对于 PF3 ,关注 [7:6]
 
 GPIOx_BSRR(GPIO port bit set/reset register)
 (x = A to K, Z)
 这些寄存器(GPIOA_MODER to GPIOK_MODER,GPIOZ_MODER)可以快速的设置 GPIO 输出 1 或者 0
 
 GPIOI_BSRR  物理地址  0x5000A000 + 0x18
 设置 GPIOI 相关引脚输出 1 或者 0 ,位定义如下,对于 PI0 关注 [16] 和 [0]
 Bits 31:16 BR[15:0]: Port x reset I/O pin y (y = 15 to 0)
 These bits are write-only. A read to these bits returns the value 0x0000.
 0: No action on the corresponding ODRx bit
 1: Resets the corresponding ODRx bit
 Bits 15:0 BS[15:0]: Port x set I/O pin y (y = 15 to 0)
 These bits are write-only. A read to these bits returns the value 0x0000.
 0: No action on the corresponding ODRx bit
 1: Sets the corresponding ODRx bit
 
 GPIOF_BSRR  物理地址  0x50007000 + 0x18
 设置 GPIOI 相关引脚输出 1 或者 0 ,位定义同上,对于 PF3 关注 [19] 和 [3]
 
 4.编写驱动和 Makefile
 程序的一个重点是对相关寄存器重映射,然后就是根据参考手册设置寄存器,具体程序,即 Makefile 如下
 led.c
 Makefile
 
 复制代码KERN_DIR = /home/liu/work/projects/atk_stm32MP157/kernel
CROSS_COMPILE = /home/liu/bin/arm/gcc-arm-9.2-2019.12-x86_64-arm-none-linux-gnueabihf/bin/arm-none-linux-gnueabihf-
my_led-y := led.o
obj-m += my_led.o
all:
        make -C $(KERN_DIR) M=`pwd` modules
clean:
        make -C $(KERN_DIR) M=`pwd` modules clean
        rm -rf modules.order
 
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