STM32-F407能同时输出两路DAC

GOUYANG

看资料STM32F407是可以输出两路DAC的，但为什么我同时使能了DAC1、DAC2用DMA传输，只有DAC2有信号输出呢？ 需要特别的设置才可以同时输出两路？
static void NVIC_Configuration(void)
{
        NVIC_InitTypeDef NVIC_InitStructure;

        /* Enable the DMA1-stream5 Interrupt */
        NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream5_IRQn;

        /* Enable the DMA1-stream5 Interrupt */
        NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream6_IRQn;


        NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
        NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
        NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
        NVIC_Init(&NVIC_InitStructure);
}
/**
  * @brief  Main program
  * @param  None
  * @retval None
  */
void DAC_User_Init(void)
{
        /* Preconfiguration before using DAC----------------------------------------*/
        GPIO_InitTypeDef GPIO_InitStructure;

        /* DMA1 clock enable */
        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
        /* GPIOA clock enable (to be used with DAC) */
        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
        /* DAC Periph clock enable */
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);

        /* DAC channel 1 & 2 (DAC_OUT1 = PA.4)(DAC_OUT2 = PA.5) configuration */
        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;

        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
        GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
        GPIO_Init(GPIOA, &GPIO_InitStructure);

        /* TIM6 Configuration ------------------------------------------------------*/
        TIM6_Config();
        
        NVIC_Configuration();
        
        init220usPulseIO(0xAA);
        
        init220usPulseTIM();
}

// DAC Control
void DAC_User_Start(void)
{
        DAC_Ch1_SineWaveConfig();
        DAC_Ch2_SineWaveConfig();
}

void DAC_User_Stop(void)
{
        DAC_DeInit();
}

/**
  * @brief  TIM6 Configuration
  * @note   TIM6 configuration is based on APB1 frequency
  * @note   TIM6 Update event occurs each TIM6CLK/256
  * @param  None
  * @retval None
  */
static void TIM6_Config(void)
{
        TIM_TimeBaseInitTypeDef    TIM_TimeBaseStructure;
        /* TIM6 Periph clock enable */
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE);

        /* --------------------------------------------------------
        TIM6 input clock (TIM6CLK) is set to 2 * APB1 clock (PCLK1),
        since APB1 prescaler is different from 1.
        TIM6CLK = 2 * PCLK1
        TIM6CLK = HCLK / 2 = SystemCoreClock /2

        TIM6 Update event occurs each TIM6CLK/256

        Note:
        SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f4xx.c file.
        Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate()
        function to update SystemCoreClock variable value. Otherwise, any configuration
        based on this variable will be incorrect.

        ----------------------------------------------------------- */
        /* Time base configuration */
        TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);


        if (SystemCoreClock == SysCLK_84MHz)
        {
                TIM_TimeBaseStructure.TIM_Period = 42;
        }
        else if (SystemCoreClock == SysCLK_168MHz)
        {
                TIM_TimeBaseStructure.TIM_Period = 84;
        }

        //TIM_TimeBaseStructure.TIM_Period = 0x7F;   
        TIM_TimeBaseStructure.TIM_Prescaler = 0;
        TIM_TimeBaseStructure.TIM_ClockDivision = 0;
        TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
        TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);

        /* TIM6 TRGO selection */
        TIM_SelectOutputTrigger(TIM6, TIM_TRGOSource_Update);

        /* TIM6 enable counter */
        TIM_Cmd(TIM6, ENABLE);
}

/**
  * @brief  DAC  Channel1 SineWave Configuration
  * @param  None
  * @retval None
  */
static void DAC_Ch1_SineWaveConfig(void)
{
        //DMA_InitTypeDef DMA_InitStructure;
        /* DISABLE DMA for DAC Channel2 */
        DAC_DMACmd(DAC_Channel_1, DISABLE);
        /* DISABLE DAC Channel1 */
        DAC_Cmd(DAC_Channel_1, DISABLE);
        /* DISABLE DMA1_Stream5 */
        DMA_Cmd(DMA1_Stream5, DISABLE);

        /* DAC channel1 Configuration */
        DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
        DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
        DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
        DAC_Init(DAC_Channel_1, &DAC_InitStructure);

        /* DMA1_Stream5 channel7 configuration **************************************/
        DMA_DeInit(DMA1_Stream5);
        DMA_InitStructure.DMA_Channel = DMA_Channel_7;
        DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R1_ADDRESS;

#if 0
        DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&aSine12bit;
        //DMA_InitStructure.DMA_BufferSize = 16;
#else
        DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(SineWaveData_A);
        //DMA_InitStructure.DMA_BufferSize = DAC_N*PSK_Symbol_Bit_Rate;
#endif

        DMA_InitStructure.DMA_BufferSize = Sin_Cyles* DAC_N;

        DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;

        DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
        DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
        DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
        DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
        //
        //DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
        DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;

        DMA_InitStructure.DMA_Priority = DMA_Priority_High;
        DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
        DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
        DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
        DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
        DMA_Init(DMA1_Stream5, &DMA_InitStructure);

        DMA_ITConfig(DMA1_Stream5, DMA_IT_TC, ENABLE);     //

#if 0
        /* Enable DMA1_Stream5 */
        DMA_Cmd(DMA1_Stream5, ENABLE);

        /* Enable DAC Channel1 */
        DAC_Cmd(DAC_Channel_1, ENABLE);

        /* Enable DMA for DAC Channel1 */
        DAC_DMACmd(DAC_Channel_1, ENABLE);
#endif

}
/**
  * @brief  DAC  Channel2 SineWave Configuration
  * @param  None
  * @retval None
  */
static void DAC_Ch2_SineWaveConfig(void)
{
        //DMA_InitTypeDef DMA_InitStructure;

        /* DISABLE DMA1_Stream6 */
        DMA_Cmd(DMA1_Stream6, DISABLE);

        /* DISABLE DAC Channel2 */
        DAC_Cmd(DAC_Channel_2, DISABLE);

        /* DISABLE DMA for DAC Channel2 */
        DAC_DMACmd(DAC_Channel_2, DISABLE);

        /* DAC channel2 Configuration */
        DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
        DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
        DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
        DAC_Init(DAC_Channel_2, &DAC_InitStructure);

        /* DMA1_Stream6 channel7 configuration **************************************/
        DMA_DeInit(DMA1_Stream6);
        DMA_InitStructure.DMA_Channel = DMA_Channel_7;
        DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R2_ADDRESS;
        DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(SineWaveData_B);

        DMA_InitStructure.DMA_BufferSize = Sin_Cyles* DAC_N;

        DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;

        DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
        DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
        DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
        DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
        //DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
        DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;

        DMA_InitStructure.DMA_Priority = DMA_Priority_High;
        DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
        DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
        DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
        DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
        DMA_Init(DMA1_Stream6, &DMA_InitStructure);

        DMA_ITConfig(DMA1_Stream6, DMA_IT_TC, ENABLE);     //

#if 0
        /* Enable DMA1_Stream6 */
        DMA_Cmd(DMA1_Stream6, ENABLE);

        /* Enable DAC Channel2 */
        DAC_Cmd(DAC_Channel_2, ENABLE);

        /* Enable DMA for DAC Channel2 */
        DAC_DMACmd(DAC_Channel_2, ENABLE);
#endif
}

// DAC1¿aê¼êä3ö
static void DAC_Channel_1_Start(void)
{
        /* Enable DMA1_Stream5 */
        DMA_Cmd(DMA1_Stream5, ENABLE);

        /* Enable DAC Channel1 */
        DAC_Cmd(DAC_Channel_1, ENABLE);

        /* Enable DMA for DAC Channel1 */
        DAC_DMACmd(DAC_Channel_1, ENABLE);        
}

// DAC2¿aê¼êä3ö
static void DAC_Channel_2_Start(void)
{
        /* Enable DMA1_Stream6 */
        DMA_Cmd(DMA1_Stream6, ENABLE);

        /* Enable DAC Channel2 */
        DAC_Cmd(DAC_Channel_2, ENABLE);

        /* Enable DMA for DAC Channel2 */
        DAC_DMACmd(DAC_Channel_2, ENABLE);
}

#define  ReConfigDAC_DMA_Config_Using_Register  1

// ¸Ä±äDACμÄêä3ö
static void DAC_Ch1_ChangeConfig(uint16_t phase)
{
#if ReConfigDAC_DMA_Config_Using_Register
        // 1
        /* DISABLE DMA1_Stream5 */
        //DMA_Cmd(DMA1_Stream5, DISABLE);
        /* Disable the selected DMAy Streamx by clearing EN bit */
        DMA1_Stream5->CR &= 0xfffffffe;//~(uint32_t)DMA_SxCR_EN;   //DMA_SxCR_EN=0x00000001;

        // 2
        //DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(&(SineWaveData[0]));
        //DMA_Init(DMA1_Stream5, &DMA_InitStructure);
        /* Write to DMAy Streamx M0AR */
        DMA1_Stream5->M0AR = (uint32_t)(SineWaveData_A);
        // 3
        //DMA_ITConfig(DMA1_Stream5, DMA_IT_TC, ENABLE);     //
        /* Enable the selected DMA transfer interrupts */
        DMA1_Stream5->CR |= (uint32_t)(DMA_IT_TC);
        // 4
        /* Enable DMA1_Stream5 */
        //DMA_Cmd(DMA1_Stream5, ENABLE);
        /* Enable the selected DMAy Streamx by setting EN bit */
        DMA1_Stream5->CR |= (uint32_t)DMA_SxCR_EN;

        // 5
        /* Enable DAC Channel1 */
        //DAC_Cmd(DAC_Channel_1, ENABLE);
        /* Enable the selected DAC channel */
        DAC->CR |= 0x00000001;     // (DAC_CR_EN1 << DAC_Channel_1);   //DAC_CR_EN1 = 0x00000001     DAC_Channel_1= 0
        // 6
        /* Enable DMA for DAC Channel1 */
        //DAC_DMACmd(DAC_Channel_1, ENABLE);
        /* Enable the selected DAC channel DMA request */
        DAC->CR |= 0x00001000;     //  (DAC_CR_DMAEN1 << DAC_Channel_1);  //DAC_CR_EN1 = 0x00001000     DAC_Channel_1 = 0x0
#else
        /* DISABLE DMA1_Stream5 */
        DMA_Cmd(DMA1_Stream5, DISABLE);

        /* DMA1_Stream5 channel7 configuration **************************************/
        //  DMA_DeInit(DMA1_Stream5);
        //  DMA_InitStructure.DMA_Channel = DMA_Channel_7;  
        //  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R1_ADDRESS;

        if (phase == 0)
                DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(&(SineWaveData[0]));
        else //if(phase == 180)
                DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(&(SineWaveData[DAC_N / 2]));

        //        DMA_InitStructure.DMA_BufferSize = DAC_N*10;

        //  DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;               
        //  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
        //  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
        //  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
        //  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
        //  DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
        //  DMA_InitStructure.DMA_Priority = DMA_Priority_High;
        //  DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;         
        //  DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
        //  DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
        //  DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
        DMA_Init(DMA1_Stream5, &DMA_InitStructure);

        DMA_ITConfig(DMA1_Stream5, DMA_IT_TC, ENABLE);     //

        /* Enable DMA1_Stream5 */
        DMA_Cmd(DMA1_Stream5, ENABLE);

        /* Enable DAC Channel1 */
        DAC_Cmd(DAC_Channel_1, ENABLE);

        /* Enable DMA for DAC Channel2 */
        DAC_DMACmd(DAC_Channel_1, ENABLE);
#endif
}

// &#184;&#196;±&#228;DAC_Ch2μ&#196;éè&#214;&#195;
static void DAC_Ch2_ChangeConfig(uint16_t phase)
{
#if ReConfigDAC_DMA_Config_Using_Register
        // 1
        /* DISABLE DMA1_Stream6 */
        //DMA_Cmd(DMA1_Stream6, DISABLE);
        /* Disable the selected DMAy Streamx by clearing EN bit */
        DMA1_Stream6->CR &= 0xfffffffe;//~(uint32_t)DMA_SxCR_EN;   //DMA_SxCR_EN=0x00000001;

        // 2
        //DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(&(SineWaveData[0]));
        //DMA_Init(DMA1_Stream6, &DMA_InitStructure);
        /* Write to DMAy Streamx M0AR */
        DMA1_Stream6->M0AR = (uint32_t)(SineWaveData_B);
        // 3
        //DMA_ITConfig(DMA1_Stream6, DMA_IT_TC, ENABLE);     //
        /* Enable the selected DMA transfer interrupts */
        DMA1_Stream6->CR |= (uint32_t)(DMA_IT_TC);
        // 4
        /* Enable DMA1_Stream6 */
        //DMA_Cmd(DMA1_Stream6, ENABLE);
        /* Enable the selected DMAy Streamx by setting EN bit */
        DMA1_Stream6->CR |= (uint32_t)DMA_SxCR_EN;

        // 5
        /* Enable DAC Channel2 */
        //DAC_Cmd(DAC_Channel_2, ENABLE);
        /* Enable the selected DAC channel */
        DAC->CR |= 0x00010000;     // (DAC_CR_EN1 << DAC_Channel_2);   //DAC_CR_EN1 = 0x00000001     DAC_Channel_2=0x10
        // 6
        /* Enable DMA for DAC Channel2 */
        //DAC_DMACmd(DAC_Channel_2, ENABLE);
        /* Enable the selected DAC channel DMA request */
        DAC->CR |= 0x10000000;     //  (DAC_CR_DMAEN1 << DAC_Channel_2);  //DAC_CR_EN1 = 0x00001000     DAC_Channel_2 = 0x10
#else
        //DMA_InitTypeDef DMA_InitStructure;

        /* DAC channel2 Configuration */
        //  DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
        //  DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
        //  DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
        //  DAC_Init(DAC_Channel_2, &DAC_InitStructure);

        /* DISABLE DMA1_Stream6 */
        DMA_Cmd(DMA1_Stream6, DISABLE);

        /* DMA1_Stream6 channel7 configuration **************************************/
        //  DMA_DeInit(DMA1_Stream6);
        //  DMA_InitStructure.DMA_Channel = DMA_Channel_7;  
        //  DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R2_ADDRESS;

        if (phase == 0)
                DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(&(SineWaveData[0]));
        else //if(phase == 180)
                DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(&(SineWaveData[DAC_N / 2]));

        //        DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
        //  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
        //  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
        //  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
        //  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
        //  DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
        //  DMA_InitStructure.DMA_Priority = DMA_Priority_High;
        //  DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;         
        //  DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
        //  DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
        //  DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
        DMA_Init(DMA1_Stream6, &DMA_InitStructure);

        DMA_ITConfig(DMA1_Stream6, DMA_IT_TC, ENABLE);     //

        /* Enable DMA1_Stream6 */
        DMA_Cmd(DMA1_Stream6, ENABLE);

        /* Enable DAC Channel2 */
        DAC_Cmd(DAC_Channel_2, ENABLE);

        /* Enable DMA for DAC Channel2 */
        DAC_DMACmd(DAC_Channel_2, ENABLE);
#endif
}

// DAC1·￠íêò&#187;×éêyoó&#214;D&#182;&#207;
void DMA1_Stream5_IRQHandler(void)
{
        //GPIOB->BSRRH=GPIO_Pin_10;
        if (DMA1->HISR & 0x00000800)
        {
                DMA1->HIFCR = 0x00000800;
               
                DAC_SetChannel1Data(DAC_Align_12b_R,1919);///syt
        }
}

// DAC2·￠íêò&#187;×éêyoó&#214;D&#182;&#207;
void DMA1_Stream6_IRQHandler(void)
{
        //GPIOB->BSRRH=GPIO_Pin_10;
        if (DMA1->HISR & 0x00200000)
        {
                DMA1->HIFCR = 0x00200000;
                DAC_SetChannel2Data(DAC_Align_12b_R,2048);///syt
        }
}


// &#191;aê&#188;·￠&#203;í
void Start_SinWave_DAC(void)
{
        uint16_t i, j;
        float fT;
        uint16_t *U16p;
        
        for (i = 0; i < DAC_N; i++) // ×&#188;±&#184;1×ésinêy&#190;Y￡&#172;μ÷&#213;&#251;·ù&#182;è
        {
                fT = Sine12bit84Step *SineWave_Amplitude_Factor+100.0f;
                Adjusted_1Cycle_SineWave_A = (unsigned short)fT;
        }

        for (i = 0; i < DAC_N / 2; i++) // μ÷&#213;&#251;DAC_2ó&#235;DAC_1μ&#196;&#207;à&#206;&#187;
        {
                Adjusted_1Cycle_SineWave_B = Adjusted_1Cycle_SineWave_A[i + DAC_N / 2];
                Adjusted_1Cycle_SineWave_B[i + DAC_N / 2] = Adjusted_1Cycle_SineWave_A;
        }

        // ×&#188;±&#184;DAC_A μ&#196;·￠&#203;í&#187;o3&#229;&#199;&#248;
        U16p = SineWaveData_A;
        for (j = 0;j < Sin_Cyles;j++)
        {
                for (i = 0; i < DAC_N; i++) //
                {
                        *U16p++ = Adjusted_1Cycle_SineWave_A;
                }
        }

        // ×&#188;±&#184;DAC_B μ&#196;·￠&#203;í&#187;o3&#229;&#199;&#248;￡&#172;oíDAC_A&#207;à&#206;&#187;2&#238;180
        U16p = SineWaveData_B;
        for (j = 0;j < Sin_Cyles;j++)
        {
                for (i = 0; i < DAC_N; i++) //
                {
                        *U16p++ = Adjusted_1Cycle_SineWave_B;
                }
        }

        
        DAC_Ch1_ChangeConfig(0);
        DAC_Ch2_ChangeConfig(0);
        
        
        TIM9_tmp = 1;
        TIM9->ARR = 241-1;
        TIM_Cmd(TIM9, ENABLE);
        GPIOB->BSRRH=GPIO_Pin_10;
}

peng1554

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