有使用STM32F103内部8M HSI做时钟源的吗？能提供RCC设置的代码吗？

rjx007 · 发表于 2018-7-8 10:18:23

有使用STM32F103内部8M HSI做时钟源的吗？能提供RCC设置的代码吗？我试了多次，都不行。

正点原子 · 发表于 2018-7-8 10:18:24

http://www.openedv.com/forum.php ... 1&highlight=HSI

warship · 发表于 2018-7-8 10:46:45

方法一：外部晶体不焊接
方法二：SystemInit不执行。

rjx007 · 发表于 2018-7-8 10:54:58

本帖最后由 rjx007 于 2018-7-8 10:56 编辑

楼上的意思就是说，如果不接外部8M晶振或屏蔽掉函数SystemInit后，系统默认就是用内部HSI了？那此时系统的主频是64M吗？

warship · 发表于 2018-7-8 12:27:31

rjx007 发表于 2018-7-8 10:54
楼上的意思就是说，如果不接外部8M晶振或屏蔽掉函数SystemInit后，系统默认就是用内部HSI了？那此时系统的 ...

不是，主频只是8M

sammy902583 · 发表于 2018-7-8 15:53:34

拿Nucleo F103RB的code来参考即可.

/**
  * @brief  System Clock Configuration
  *       The system Clock is configured as follow :
  *          System Clock source          = PLL (HSI)
  *          SYSCLK(Hz)                   = 64000000
  *          HCLK(Hz)                      = 64000000
  *          AHB Prescaler                = 1
  *          APB1 Prescaler                = 2
  *          APB2 Prescaler                = 1
  *          PLLMUL                      = 16
  *          Flash Latency(WS)             = 2
  * @param  None
  * @retval None
  */
void SystemClock_Config(void)
{
  RCC_ClkInitTypeDef clkinitstruct = {0};
  RCC_OscInitTypeDef oscinitstruct = {0};

  /* Configure PLL ------------------------------------------------------*/
  /* PLL configuration: PLLCLK = (HSI / 2) * PLLMUL = (8 / 2) * 16 = 64 MHz */
  /* PREDIV1 configuration: PREDIV1CLK = PLLCLK / HSEPredivValue = 64 / 1 = 64 MHz */
  /* Enable HSI and activate PLL with HSi_DIV2 as source */
  oscinitstruct.OscillatorType  = RCC_OSCILLATORTYPE_HSI;
  oscinitstruct.HSEState       = RCC_HSE_OFF;
  oscinitstruct.LSEState       = RCC_LSE_OFF;
  oscinitstruct.HSIState       = RCC_HSI_ON;
  oscinitstruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  oscinitstruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
  oscinitstruct.PLL.PLLState = RCC_PLL_ON;
  oscinitstruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
  oscinitstruct.PLL.PLLMUL    = RCC_PLL_MUL16;
  if (HAL_RCC_OscConfig(&oscinitstruct)!= HAL_OK)
  {
/* Initialization Error */
while(1);
  }

  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
   clocks dividers */
  clkinitstruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
  clkinitstruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  clkinitstruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  clkinitstruct.APB2CLKDivider = RCC_HCLK_DIV1;
  clkinitstruct.APB1CLKDivider = RCC_HCLK_DIV2;
  if (HAL_RCC_ClockConfig(&clkinitstruct, FLASH_LATENCY_2)!= HAL_OK)
  {
/* Initialization Error */
while(1);
  }
}