特权同学的串口代码

一个菜鸟 · 发表于 2017-10-16 09:56:30

新上手学习FPGA，入手特权同学的板子，

if(clk_bps) begin
num <= num + 1'b1;
case(num)
4'd0: rs232_txr <= 1'b0; //发送起始位
4'd1: rs232_txr <= tx_data[0]; //发送bit0
4'd2: rs232_txr <= tx_data[1]; //发送bit1
4'd3: rs232_txr <= tx_data[2]; //发送bit2
4'd4: rs232_txr <= tx_data[3]; //发送bit3
4'd5: rs232_txr <= tx_data[4]; //发送bit4
4'd6: rs232_txr <= tx_data[5]; //发送bit5
4'd7: rs232_txr <= tx_data[6]; //发送bit6
4'd8: rs232_txr <= tx_data[7]; //发送bit7
4'd9: rs232_txr <= 1'b1; //发送停止位
default: rs232_txr <= 1'b1;
endcase
end

num=0的这种情况怎么发生，num感觉是从1开始的，怎么能发送起始位？