请大神帮我解读下F4芯片手册上有关ADC采集时间的介绍

duruedubbie

The ADC samples the input voltage for a number of ADCCLK cycles that can be modified using the SMP[2:0] bits in the ADC_SMPR1 and ADC_SMPR2 registers. Each channel can
be sampled with a different sampling time.
The total conversion time is calculated as follows:
Tconv = Sampling time + 12 cycles
Example:
With ADCCLK = 38 MHz and sampling time = 3 cycles:
Tconv = 3 + 12 = 15 cycles = 0.5 μs with APB2 at 60 MHz  


举例中的15cycles的时钟频率是38MHZ，还是60MHZ

duruedubbie

偶然翻了一下中文手册，发现中文手册上写的是30MHZ，30MHZ就对了。ABP2的60MHZ，分频系数为2。这英文手册还是我从官网上下的，醉了醉了。