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发表于 2016-8-23 09:59:04
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本帖最后由 sunyou26 于 2016-8-25 10:55 编辑
[mw_shl_code=applescript,true]void init_uart(void)
{
_asm("rim");
CLK_PCKENR1 |= SETBIT2; //fMASTER to peripheral enabled--UART1
UART1_CR2 &= CLRBIT2; //Receiver is disabled
UART1_CR2 &= CLRBIT3; //Transmitter is disabled
UART1_BRR2 = 0x1b; //Baud rate register 2 2400=0x1b 9600=0x03
UART1_BRR1 = 0xa0; //Baud rate register 1 2400=0xa0 9600=0x68
UART1_CR3 &= CLRBIT4; //1 Stop bit
UART1_CR3 &= CLRBIT5; //1 Stop bit
UART1_CR1 &= CLRBIT2; //Parity control disabled
UART1_CR1 &= CLRBIT4; //1 Start bit, 8 Data bits, 1 Stop bit
UART1_CR2 &= CLRBIT6; //Interrupt is inhibited
UART1_CR2 |= SETBIT5; //An UART interrupt is generated whenever OR=1 or RXNE=1 in the UART_SR register
UART1_CR1 &= CLRBIT5; //UART enabled
UART1_CR2 |= SETBIT2; //Receiver is enabled and begins searching for a start bit
UART1_CR2 |= SETBIT3; //Transmitter is enabled
}
@far @interrupt void UART_Rx_Interrupt(void)
{
unsigned char temp[5] = {0x01, 0x02, 0x03, 0x04};
char i;
temp[4] = UART1_DR;
PA_ODR &= CLRBIT3;
for(i = 0; i < 5; i++)
{
while((UART1_SR & CHSBIT7) == 0x00); //wait for data transfers to shift register
UART1_DR = temp;
}
while((UART1_SR & CHSBIT6) == 0x00); //wait for transmit complete
PA_ODR |= SETBIT3; //note: TC bit is set 1 after reset,it is clear by a software sequence
//(a read to the UART_SR register followed by a write to the UART_DR register)
}
[/mw_shl_code]
收到什么回发什么,你自己看看吧
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