我使用TIM+DAC+DMA的配置生成正弦波。用TIM7作为触发源,DAC1转换,DMA2 CH3传输数据。
实测时,我希望同时代开TIM7和DMA2_CH3的中断,目的是检查每秒的转换次数和DMA搬运次数。
我设定的TIM7溢出频率是16000Hz, 数据源的尺寸是32字节。
如果单独打开TIM7溢出中断,可以看到每秒钟转换次数是16000次。
如果单独打开DMA传输完成中断,可以看到每秒搬运了500组数据(16000/32=500)。
然后问题来了: 如果同时打开TIM7的溢出中断和DMA传输完成中断,则DAC没有得到一次转换,DMA也没有进行任何一次搬运。 但是可以看到TIM7每秒的溢出次数仍然是正确的16000。
是不是在这种配置下面TIM发出的Update事件被截获或者是被屏蔽了,导致DAC得不到触发?
以下附上代码
[mw_shl_code=c,true]void User_Init_DAC(uint32_t bOn)
{
GPIO_InitTypeDef GPIO_InitStructure;
DAC_InitTypeDef DAC_InitStructure;
DMA_InitTypeDef DMA_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure,NVIC_InitStructure1;
uint16_t PrescalerValue = 0;
if(bOn)
{
// Periph clock enable
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM7, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_Init(GPIOA, &GPIO_InitStructure);
// Reset TIM7
TIM_DeInit(TIM7);
// TIM6 Configuration
TIM_PrescalerConfig(TIM7, 44, TIM_PSCReloadMode_Update); //分频系数为 PSC+1 =15
TIM_SetAutoreload(TIM7, 99); //计数系数为 ARR+1 =100
// TIM7 TRGO selection
TIM_SelectOutputTrigger(TIM7, TIM_TRGOSource_Update);
// TIM Interrupts enable
NVIC_InitStructure1.NVIC_IRQChannel = TIM7_IRQn;
NVIC_InitStructure1.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure1.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure1.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure1);
TIM_ITConfig(TIM7, TIM_IT_Update, ENABLE);
/* DAC channel1 Configuration */
DAC_InitStructure.DAC_Trigger = DAC_Trigger_T7_TRGO;
//DAC_InitStructure.DAC_Trigger = DAC_Trigger_Software;
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Disable;
DAC_Init(DAC_Channel_1, &DAC_InitStructure);
DMA_DeInit(DMA2_Channel3);
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&DAC->DHR12R1;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&Sine12bit; //change
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = 32; //32;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA2_Channel3, &DMA_InitStructure);
//DMA Interrupt enable
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Channel3_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
DMA_ITConfig(DMA2_Channel3,DMA_IT_HT|DMA_IT_TC,ENABLE);
// Enable DMA2 Channel3
DMA_Cmd(DMA2_Channel3, ENABLE);
// Enable DAC
DAC_Cmd(DAC_Channel_1, ENABLE);
// Enable DMA for DAC Channel1
DAC_DMACmd(DAC_Channel_1, ENABLE);
TIM_Cmd(TIM7, ENABLE);
}
else
{
TIM_DeInit(TIM7);
}
}
[/mw_shl_code]
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