[mw_shl_code=c,true]int main(void)
{
TIM_TimeBaseInitTypeDef TIM1_TimeBaseStructure;
TIM_OCInitTypeDef TIM1_OCInitStructure;
TIM_BDTRInitTypeDef TIM1_BDTRInitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_Configuration();
RCC_Configuration();
/* ADCCLK = PCLK2/6 */
RCC_ADCCLKConfig(RCC_PCLK2_Div6);
/* Enable DMA clock */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
/* Enable GPIOA, GPIOB, AFIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA |
RCC_APB2Periph_GPIOB, ENABLE);
/* Enable ADC1 clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
/* Enable ADC2 clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE);
/* Enable TIM1 clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
/* ADC1, ADC2, PWM pins configurations -------------------------------------*/
GPIO_StructInit(&GPIO_InitStructure);
/****** Configure PA.05,06,7(ADC Channels [5..7]) as analog input ****/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_StructInit(&GPIO_InitStructure);
/****** Configure PA.03 (ADC Channels [3]) as analog input ******/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_Init(GPIOB, &GPIO_InitStructure);
/* TIM1 Peripheral Configuration -------------------------------------------*/
/* TIM1 Registers reset */
TIM_DeInit(TIM1);
TIM_TimeBaseStructInit(&TIM1_TimeBaseStructure);
/* Time Base configuration */
TIM1_TimeBaseStructure.TIM_Prescaler = 0x0; //???????.
TIM1_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned1; //???????????.
TIM1_TimeBaseStructure.TIM_Period = 5000; //????.
TIM1_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV2; //?? 2??.???
// Initial condition is REP=0 to set the UPDATE only on the underflow
TIM1_TimeBaseStructure.TIM_RepetitionCounter = 1; //????
TIM_TimeBaseInit(TIM1, &TIM1_TimeBaseStructure); //???TIM1?????? .
TIM_OCStructInit(&TIM1_OCInitStructure);
/* Channel 1, 2,3 in PWM mode */
TIM1_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1; //??????PWM1.
TIM1_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; //??????.
TIM1_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable; //????????.
TIM1_OCInitStructure.TIM_Pulse = 0x505; //dummy value //??(???).
TIM1_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; //??????????.
TIM1_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High; //???????????.
TIM1_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset; //???????.
TIM1_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset; //?????????.
TIM_OC1Init(TIM1, &TIM1_OCInitStructure);
TIM_OC2Init(TIM1, &TIM1_OCInitStructure);
TIM_OC3Init(TIM1, &TIM1_OCInitStructure);
/*Timer1 alternate function full remapping*/
GPIO_PinRemapConfig(GPIO_FullRemap_TIM1,ENABLE);
GPIO_StructInit(&GPIO_InitStructure);
/* GPIOE Configuration: Channel 1, 1N, 2, 2N, 3, 3N and 4 Output */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_StructInit(&GPIO_InitStructure);
/* GPIOE Configuration: BKIN pin */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOB, &GPIO_InitStructure);
TIM_OCStructInit(&TIM1_OCInitStructure);
/* Channel 4 Configuration in OC */
TIM1_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
TIM1_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM1_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;
TIM1_OCInitStructure.TIM_Pulse = 5000 - 1;
TIM1_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM1_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;
TIM1_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;
TIM1_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;
TIM_OC4Init(TIM1, &TIM1_OCInitStructure);
/* Enables the TIM1 Preload on CC1 Register */
TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);
/* Enables the TIM1 Preload on CC2 Register */
TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable);
/* Enables the TIM1 Preload on CC3 Register */
TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Enable);
/* Enables the TIM1 Preload on CC4 Register */
TIM_OC4PreloadConfig(TIM1, TIM_OCPreload_Enable);
/* Automatic Output enable, Break, dead time and lock configuration*/
TIM1_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
TIM1_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
TIM1_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_1;
TIM1_BDTRInitStructure.TIM_DeadTime = 11;
TIM1_BDTRInitStructure.TIM_Break = TIM_Break_Enable;
TIM1_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_Low;
TIM1_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
TIM_BDTRConfig(TIM1, &TIM1_BDTRInitStructure);
TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
TIM_ClearITPendingBit(TIM1, TIM_IT_Break);
TIM_ITConfig(TIM1, TIM_IT_Break,ENABLE);
/* TIM1 counter enable */
TIM_Cmd(TIM1, ENABLE);
// Resynch to have the Update evend during Undeflow
TIM_GenerateEvent(TIM1, TIM_EventSource_Update);
// Clear Update Flag
TIM_ClearFlag(TIM1, TIM_FLAG_Update);
TIM_ITConfig(TIM1, TIM_IT_Update, DISABLE);
TIM_ITConfig(TIM1, TIM_IT_CC4,DISABLE);
/* Configure one bit for preemption priority */
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
/* Enable the TIM1 BRK Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM1_BRK_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
while(1)
{
}
}[/mw_shl_code]
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