FPGA电机测速问题，求助！！

DeBugMCU · 发表于 2021-5-18 18:35:29

我要用FPGA实现电机驱动并且测速，测速选择的是光耦模块，有遮挡的时候为高电平，无遮挡时为低电平。也就是说，通过检测固定时间内测速传感器的上升沿个数来检测当前电机的速度。
我的想法是给电机绑一个长条，测量一秒钟内上升沿的个数，并且将数值发送到串口，这样就可以知道电机转速为 x转/秒。
目前计数功能，串口发送什么的都已经实现了。
但是，当我将遮挡物拿开的时候，计数并不清零，而是持续显示最新的一次测量数值，再次测量的时候还是接着上次的数值继续增加。试了一些方法，还是没有实现，不知道问题出在哪里，请大神指导一下。

目前的代码如下：

顶层模块：

module motor(
input sys_clk, //时钟输入，50MHz
input sys_rst_n, //系统复位信号，下降沿有效
input speed_val, //速度信号输入
output uart_tx
);
parameter time_ones = 50_000_000;
reg speed_reg1;
reg speed_reg2;
reg speed_rise;
reg [7: 0] speed_count;
reg [7: 0] speed_Average;
reg [25: 0] time_cnt;
always@(posedge sys_clk,negedge sys_rst_n)
begin
if(!sys_rst_n)
begin
speed_reg1 <= 1'b0;
speed_reg2 <= 1'b0;
end
else begin
speed_reg1 <= speed_val;
speed_reg2 <= speed_reg1;
end
end
always@(posedge sys_clk,negedge sys_rst_n)
begin
if(!sys_rst_n)
speed_rise <= 1'b0;
else if(!speed_reg2 && speed_reg1)
speed_rise <= 1'b1;
else
speed_rise <= 1'b0;
end
always@(posedge sys_clk or negedge sys_rst_n)
begin
if(!sys_rst_n)
speed_count <= 'b0;
else if(speed_rise)
speed_count <= speed_count + 1;
else
speed_count <= speed_count;
end
always@(posedge sys_clk or negedge sys_rst_n)
begin
if(!sys_rst_n)
speed_Average <= 'b0;
else if(time_cnt == 49999999)
speed_Average <= 0;
else
speed_Average <= speed_count;
end
always@(posedge sys_clk,negedge sys_rst_n)
begin
if(!sys_rst_n)
time_cnt <= 'b0;
else if(time_cnt == 49999999)
time_cnt <= 0;
else
time_cnt <= time_cnt + 1'b1;
end
/*串口显示单元*/
reg Send_Go;
reg [7:0]Data;
uart_byte_tx uart_byte_tx(
.sys_clk(sys_clk),
.sys_rst_n(sys_rst_n),
.Data(Data),
.Send_Go(Send_Go),
.Baud_set(3'd0),
.uart_tx(uart_tx),
.Tx_done(Tx_done)
);
reg [25:0]counter;
always@(posedge sys_clk or negedge sys_rst_n)
if(!sys_rst_n)
counter <= 0;
else if(counter == 49999999)
counter <= 0;
else
counter <= counter + 1;
always@(posedge sys_clk or negedge sys_rst_n)
if(!sys_rst_n)
Send_Go <= 0;
else if(counter == 1)
Send_Go <= 1;
else
Send_Go <= 0;
always@(posedge sys_clk or negedge sys_rst_n)
if(!sys_rst_n)
Data <= 0;
else if(Tx_done)
Data <= speed_Average;
endmodule

复制代码

串口发送子模块：

module uart_byte_tx(
sys_clk,
sys_rst_n,
Data,
Send_Go,
Baud_set,
uart_tx,
Tx_done
);
input sys_clk;
input sys_rst_n;
input [7:0]Data;
input Send_Go;
input [2:0]Baud_set;
output reg uart_tx;
output reg Tx_done;
//Baud_set = 0 就让波特率 = 9600；
//Baud_set = 1 就让波特率 = 19200
//Baud_set = 2 就让波特率 = 38400；
//Baud_set = 3 就让波特率 = 57600；
//Baud_set = 4 就让波特率 = 115200；
reg [17:0]bps_DR;
always@(*)
case(Baud_set)
0:bps_DR = 1000000000/9600/20;
1:bps_DR = 1000000000/19200/20;
2:bps_DR = 1000000000/38400/20;
3:bps_DR = 1000000000/57600/20;
4:bps_DR = 1000000000/115200/20;
default:bps_DR = 1000000000/9600/20;
endcase
reg Send_en;
always@(posedge sys_clk or negedge sys_rst_n)
if(!sys_rst_n)
Send_en <= 0;
else if(Send_Go)
Send_en <= 1;
else if(Tx_done)
Send_en <= 0;
reg [7:0]r_Data;
always@(posedge sys_clk)
if(Send_Go)
r_Data <= Data;
else
r_Data <= r_Data;
wire bps_clk;
assign bps_clk = (div_cnt == 1);
reg [17:0]div_cnt;
always@(posedge sys_clk or negedge sys_rst_n)
if(!sys_rst_n)
div_cnt <= 0;
else if(Send_en)begin
if(div_cnt == bps_DR - 1)
div_cnt <= 0;
else
div_cnt <= div_cnt + 1'b1;
end
else
div_cnt <= 0;
reg [3:0]bps_cnt;
always@(posedge sys_clk or negedge sys_rst_n)
if(!sys_rst_n)
bps_cnt <= 0;
else if(Send_en)begin
if(bps_clk)begin
if(bps_cnt == 11)
bps_cnt <= 0;
else
bps_cnt <= bps_cnt + 1'b1;
end
end
else
bps_cnt <= 0;
always@(posedge sys_clk or negedge sys_rst_n)
if(!sys_rst_n) begin
uart_tx <= 1'b1;
end
else begin
case(bps_cnt)
1:uart_tx <= 0;
2:uart_tx <= r_Data[0];
3:uart_tx <= r_Data[1];
4:uart_tx <= r_Data[2];
5:uart_tx <= r_Data[3];
6:uart_tx <= r_Data[4];
7:uart_tx <= r_Data[5];
8:uart_tx <= r_Data[6];
9:uart_tx <= r_Data[7];
10:uart_tx <= 1;
11:begin uart_tx <= 1;end
default:uart_tx <= 1;
endcase
end
always@(posedge sys_clk or negedge sys_rst_n)
if(!sys_rst_n)
Tx_done <= 0;
else if((bps_clk == 1) && (bps_cnt == 10))
Tx_done <= 1;
else
Tx_done <= 0;
endmodule

复制代码

效果如下：

测试效果

0B之后我已经将遮挡物拿开，但是他还是继续保持0B，并没有清零。
测速模块用的这种的：

tangkuan660 · 发表于 2021-5-18 18:35:30

你的speed_count一直没有清0，当然一直累加了。应该在每1秒到时，清0.
代码应该改成这样：
always@(posedge sys_clk or negedge sys_rst_n)
begin
      if(!sys_rst_n)
               speed_count <= 'b0;
   else if(time_cnt == 49999999)
speed_count <= 0;
      else if(speed_rise)
            speed_count <= speed_count + 1;
      else
            speed_count <= speed_count;
end

always@(posedge sys_clk or negedge sys_rst_n)
begin
      if(!sys_rst_n)
               speed_Average <= 'b0;
      else if(time_cnt == 49999999)
            speed_Average <= speed_count ;
      else
            speed_Average <= speed_Average ;
end