24L01定义

zbh2012000

<div>#define NRF24L01_READ_REG &nbsp; &nbsp; &nbsp; &nbsp;0x00 &nbsp;//读配置寄存器,低5位为寄存器地址</div>
<div>#define NRF24L01_WRITE_REG &nbsp; &nbsp; &nbsp; 0x20 &nbsp;//写配置寄存器,低5位为寄存器地址</div>
<div>#define NRF24L01_RD_RX_PLOAD &nbsp; &nbsp; 0x61 &nbsp;//读RX有效数据,1~32字节</div>
<div>#define NRF24L01_WR_TX_PLOAD &nbsp; &nbsp; 0xA0 &nbsp;//写TX有效数据,1~32字节</div>
<div>#define NRF24L01_FLUSH_TX &nbsp; &nbsp; &nbsp; &nbsp;0xE1 &nbsp;//清除TX FIFO寄存器.发射模式下用</div>
<div>#define NRF24L01_FLUSH_RX &nbsp; &nbsp; &nbsp; &nbsp;0xE2 &nbsp;//清除RX FIFO寄存器.接收模式下用</div>
<div>#define NRF24L01_REUSE_TX_PL &nbsp; &nbsp; 0xE3 &nbsp;//重新使用上一包数据,CE为高,数据包被不断发送.</div>
<div>#define NRF24L01_NOP &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0xFF &nbsp;//空操作,可以用来读状态寄存器</div>
<div>//SPI(NRF24L01)寄存器地址</div>
<div>#define CONFIG &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;0x00 &nbsp;//配置寄存器地址;bit0:1接收模式,0发射模式;bit1:电选择;bit2:CRC模式;bit3:CRC使能;</div>
<div>&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; //bit4:中断MAX_RT(达到最大重发次数中断)使能;bit5:中断TX_DS使能;bit6:中断RX_DR使能</div>
<div>#define EN_AA &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0x01 &nbsp;//使能自动应答功能 &nbsp;bit0~5,对应通道0~5</div>
<div>#define EN_RXADDR &nbsp; &nbsp; &nbsp; 0x02 &nbsp;//接收地址允许,bit0~5,对应通道0~5</div>
<div>#define SETUP_AW &nbsp; &nbsp; &nbsp; &nbsp;0x03 &nbsp;//设置地址宽度(所有数据通道):bit1,0:00,3字节;01,4字节;02,5字节;</div>
<div>#define SETUP_RETR &nbsp; &nbsp; &nbsp;0x04 &nbsp;//建立自动重发;bit3:0,自动重发计数器;bit7:4,自动重发延时 250*x+86us</div>
<div>#define RF_CH &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; 0x05 &nbsp;//RF通道,bit6:0,工作通道频率;</div>
<div>#define RF_SETUP &nbsp; &nbsp; &nbsp; &nbsp;0x06 &nbsp;//RF寄存器;bit3:传输速率(0:1Mbps,1:2Mbps);bit2:1,发射功率;bit0:低噪声放大器增益</div>
<div>#define STATUS &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;0x07 &nbsp;//状态寄存器;bit0:TX FIFO满标志;bit3:1,接收数据通道号(最大:6);bit4,达到最多次重发</div>
<div>&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; //bit5:数据发送完成中断;bit6:接收数据中断;</div>
<div>#define MAX_TX &nbsp;<span class="Apple-tab-span" style="white-space:pre;">                </span>0x10 &nbsp;//达到最大发送次数中断</div>
<div>#define TX_OK &nbsp;&nbsp;<span class="Apple-tab-span" style="white-space:pre;">                </span>0x20 &nbsp;//TX发送完成中断</div>
<div>#define RX_OK &nbsp;&nbsp;<span class="Apple-tab-span" style="white-space:pre;">                </span>0x40 &nbsp;//接收到数据中断</div>
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<div>#define OBSERVE_TX &nbsp; &nbsp; &nbsp;0x08 &nbsp;//发送检测寄存器,bit7:4,数据包丢失计数器;bit3:0,重发计数器</div>
<div>#define CD &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;0x09 &nbsp;//载波检测寄存器,bit0,载波检测;</div>
<div>#define RX_ADDR_P0 &nbsp; &nbsp; &nbsp;0x0A &nbsp;//数据通道0接收地址,最大长度5个字节,低字节在前</div>
<div>#define RX_ADDR_P1 &nbsp; &nbsp; &nbsp;0x0B &nbsp;//数据通道1接收地址,最大长度5个字节,低字节在前</div>
<div>#define RX_ADDR_P2 &nbsp; &nbsp; &nbsp;0x0C &nbsp;//数据通道2接收地址,最低字节可设置,高字节,必须同RX_ADDR_P1[39:8]相等;</div>
<div>#define RX_ADDR_P3 &nbsp; &nbsp; &nbsp;0x0D &nbsp;//数据通道3接收地址,最低字节可设置,高字节,必须同RX_ADDR_P1[39:8]相等;</div>
<div>#define RX_ADDR_P4 &nbsp; &nbsp; &nbsp;0x0E &nbsp;//数据通道4接收地址,最低字节可设置,高字节,必须同RX_ADDR_P1[39:8]相等;</div>
<div>#define RX_ADDR_P5 &nbsp; &nbsp; &nbsp;0x0F &nbsp;//数据通道5接收地址,最低字节可设置,高字节,必须同RX_ADDR_P1[39:8]相等;</div>
<div>#define TX_ADDR &nbsp; &nbsp; &nbsp; &nbsp; 0x10 &nbsp;//发送地址(低字节在前),ShockBurstTM模式下,RX_ADDR_P0与此地址相等</div>
<div>#define RX_PW_P0 &nbsp; &nbsp; &nbsp; &nbsp;0x11 &nbsp;//接收数据通道0有效数据宽度(1~32字节),设置为0则非法</div>
<div>#define RX_PW_P1 &nbsp; &nbsp; &nbsp; &nbsp;0x12 &nbsp;//接收数据通道1有效数据宽度(1~32字节),设置为0则非法</div>
<div>#define RX_PW_P2 &nbsp; &nbsp; &nbsp; &nbsp;0x13 &nbsp;//接收数据通道2有效数据宽度(1~32字节),设置为0则非法</div>
<div>#define RX_PW_P3 &nbsp; &nbsp; &nbsp; &nbsp;0x14 &nbsp;//接收数据通道3有效数据宽度(1~32字节),设置为0则非法</div>
<div>#define RX_PW_P4 &nbsp; &nbsp; &nbsp; &nbsp;0x15 &nbsp;//接收数据通道4有效数据宽度(1~32字节),设置为0则非法</div>
<div>#define RX_PW_P5 &nbsp; &nbsp; &nbsp; &nbsp;0x16 &nbsp;//接收数据通道5有效数据宽度(1~32字节),设置为0则非法</div>
<div>#define FIFO_STATUS &nbsp; &nbsp; 0x17 &nbsp;//FIFO状态寄存器;bit0,RX FIFO寄存器空标志;bit1,RX FIFO满标志;bit2,3,保留</div>
<div>&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; //bit4,TX FIFO空标志;bit5,TX FIFO满标志;bit6,1,循环发送上一数据包.0,不循环;<br />
24L01里的这些是根据什么定义的？</div>

正点原子

看datasheet啊。。。。