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pcb规则检查有错误,该怎么解决,求帮忙

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发表于 2016-12-19 14:51:29 | 显示全部楼层 |阅读模式
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Date
:
2016/12/19
Time
:
14:15:22
Elapsed Time
:
00:00:00
Filename
:
F:\AltiumDesignerWorkSpace\task3\PCB1.PcbDoc


Warnings
:
0
Rule Violations
:
14



Summary
Warnings
Count
Total
0


Rule Violations
Count
Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
0
Clearance Constraint (Gap=0.2mm) (All),(All)
0
Width Constraint (Min=0.1mm) (Max=0.2mm) (Preferred=0.2mm) (All)
0
Net Antennae (Tolerance=0mm) (All)
0
Silk to Silk (Clearance=0.254mm) (All),(All)
0
Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
14
Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
0
Hole To Hole Clearance (Gap=0.254mm) (All),(All)
0
Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)
0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
0
Un-Routed Net Constraint ( (All) )
0
Short-Circuit Constraint (Allowed=No) (All),(All)
0
Total
14



Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
Track (7.62mm,45.466mm)(7.62mm,46.482mm) Top Overlay
Pad R2-1(7.62mm,47.498mm) Multi-Layer
Track (7.62mm,38.354mm)(7.62mm,39.37mm) Top Overlay
Pad R2-2(7.62mm,37.338mm) Multi-Layer
Track (5.88mm,53.34mm)(14.44mm,53.34mm) Top Overlay
Pad S2-1(12.7mm,54.61mm) Multi-Layer
Track (5.88mm,55.88mm)(14.44mm,55.88mm) Top Overlay
Pad S2-1(12.7mm,54.61mm) Multi-Layer
Track (5.88mm,53.34mm)(14.44mm,53.34mm) Top Overlay
Pad S2-2(7.62mm,54.61mm) Multi-Layer
Track (5.88mm,55.88mm)(14.44mm,55.88mm) Top Overlay
Pad S2-2(7.62mm,54.61mm) Multi-Layer
Track (48.94mm,51.14mm)(55.34mm,51.14mm) Top Overlay
Pad D1-1(53.34mm,52.07mm) Multi-Layer
Track (48.94mm,55.54mm)(55.34mm,55.54mm) Top Overlay
Pad D1-2(53.34mm,54.61mm) Multi-Layer
Track (73.914mm,47.498mm)(73.914mm,48.514mm) Top Overlay
Pad R1-1(73.914mm,49.53mm) Multi-Layer
Track (73.914mm,40.386mm)(73.914mm,41.402mm) Top Overlay
Pad R1-2(73.914mm,39.37mm) Multi-Layer
Track (73.66mm,16.04mm)(73.66mm,24.6mm) Top Overlay
Pad S1-1(74.93mm,17.78mm) Multi-Layer
Track (76.2mm,16.04mm)(76.2mm,24.6mm) Top Overlay
Pad S1-1(74.93mm,17.78mm) Multi-Layer
Track (73.66mm,16.04mm)(73.66mm,24.6mm) Top Overlay
Pad S1-2(74.93mm,22.86mm) Multi-Layer
Track (76.2mm,16.04mm)(76.2mm,24.6mm) Top Overlay
Pad S1-2(74.93mm,22.86mm) Multi-Layer
Back to top



日期

19 / 12 / 2016
时间

14:15:22
经过的时间

00:00:00
文件名

F:altiumdesignerworkspacetask3pcb1.pcbdoc
警告


违反规则

十四
总结
警告
计数


违反规则
计数
电源层连接规则(安全连接)(扩展= 0.508mm)(导体宽度= 0.254mm)(空气间隙= 0.254mm)(条目= 4)(所有)

间隙(间隙为0.2mm)约束(所有),(所有)

宽度约束(min = 0.1mm)(最大为0.2mm)(首选=0.2mm)(全部)

网络的触角(耐= 0mm)(全部)

丝绸(间隙= 0.254mm)(所有),(所有)

丝Solder Mask(间隙= 0.254mm)(ispad),(所有)
十四
最小的Solder Mask Sliver(缺口= 0.254mm)(所有),(所有)

孔与孔的间隙(间隙= 0.254mm)(所有),(所有)

孔的尺寸约束(min = 0.025mm)(max = 2.54mm)(全部)

高度约束(min = 0mm)(max = 25.4mm)(优先= 12.7mm)(全部)

未路由的网络约束((所有))

短路限制(允许=不)(全部),(全部)


十四
丝Solder Mask(间隙= 0.254mm)(ispad),(所有)
轨道(7.62毫米,45.466mm)(7.62毫米,顶部覆盖46.482mm)
垫R2-1(7.62毫米,47.498mm)多层
轨道(7.62毫米,38.354mm)(7.62毫米,顶部覆盖39.37mm)
垫R2-2(7.62毫米,37.338mm)多层
轨道(5.88mm,53.34mm)(14.44mm,53.34mm)顶部覆盖
垫S2-1(12.7mm,54.61mm)多层
轨道(5.88mm,55.88mm)(14.44mm,55.88mm)顶部覆盖
垫S2-1(12.7mm,54.61mm)多层
轨道(5.88mm,53.34mm)(14.44mm,53.34mm)顶部覆盖
垫S2-2(7.62毫米,54.61mm)多层
轨道(5.88mm,55.88mm)(14.44mm,55.88mm)顶部覆盖
垫S2-2(7.62毫米,54.61mm)多层
轨道(48.94mm,51.14mm)(55.34mm,51.14mm)顶部覆盖
垫D1-1(53.34mm,52.07mm)多层
轨道(48.94mm,55.54mm)(55.34mm,55.54mm)顶部覆盖
垫d1-2(53.34mm,54.61mm)多层
轨道(73.914mm,47.498mm)(73.914mm,48.514mm)顶部覆盖
垫r1-1(73.914mm,49.53mm)多层
轨道(73.914mm,40.386mm)(73.914mm,41.402mm)顶部覆盖
垫(73.914mm R1-2,39.37mm)多层
轨道(73.66mm,16.04mm)(73.66mm,24.6mm)顶部覆盖
(74.93mm垫去,17.78mm)多层
轨道(76.2毫米,16.04mm)(76.2毫米,顶部覆盖24.6mm)
(74.93mm垫去,17.78mm)多层
轨道(73.66mm,16.04mm)(73.66mm,24.6mm)顶部覆盖
垫(74.93mm S1-2,22.86mm)多层
轨道(76.2毫米,16.04mm)(76.2毫米,顶部覆盖24.6mm)
垫(74.93mm S1-2,22.86mm)多层
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就是这句  “ 丝Solder Mask(间隙= 0.254mm)(ispad),(所有)十四”,有14个错误。


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发表于 2016-12-20 10:34:06 | 显示全部楼层
可以设置为为零 快件间d+r里找到,Silk To Solder Mask  改成0
就算有一天梦想成真,而你做好准备了吗?
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发表于 2019-8-7 17:46:47 | 显示全部楼层
老虎的菜 发表于 2016-12-20 10:34
可以设置为为零 快件间d+r里找到,Silk To Solder Mask  改成0

设置为零后,对做板子没有影响吗
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