ZYNQ7020+RTL8211E-VL-CG，网络不通

yutao99

yutao99

1. 我正在使用的硬件平台是 Xilinx Zynq7020，网络模块包括 PHY 芯片 RTL8211E-VL-CG，原理图是自己仿照画的。2.使用的开发环境是 Xilinx SDK，并且导入了 lwIP Echo Server 示例代码。
3.现在遇到的具体问题是执行程序后自动协商成功，并且能够成功读取 PHY 寄存器，但是无法ping 通 IP 地址。
4.手上有一套领航者V2的开发板，导入lwIP Echo Server 示例代码，没有任何问题，RTL8211E-VL-CG是属于RELTEX系列的，官方驱动已经支持了，所以我是怀疑硬件电路方面设计的有问题，有没有大神帮忙分析下，十分感谢。
日志打印如下：
-----lwIP TCP echo server ------
TCP packets sent to port 9000 will be echoed back
XEmacPs_SetMacAddress:set_mac_addr[31:0]:0x0
XEmacPs_SetMacAddress:set_mac_addr[47:21]:0x0
XEmacPs_SetMacAddress:set_mac_addr[31:0]:0x0
XEmacPs_SetMacAddress:set_mac_addr[47:21]:0x0
XEmacPs_SetMacAddress:set_mac_addr[31:0]:0x0
XEmacPs_SetMacAddress:set_mac_addr[47:21]:0x0
XEmacPs_SetMacAddress:set_mac_addr[31:0]:0x0
XEmacPs_SetMacAddress:set_mac_addr[47:21]:0x0
XEmacPs_SetMacAddress:set_mac_addr[31:0]:0x350A00
XEmacPs_SetMacAddress:set_mac_addr[47:21]:0x201
detect_phyHY_DETECT_REG:phy_addr:31   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:30   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:29   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:28   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:27   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:26   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:25   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:24   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:23   phy_reg:0xFFFF
detect_phyHY_DETECT_REG:phy_addr:22   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:21   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:20   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:19   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:18   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:17   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:16   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:15   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:14   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:13   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:12   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:11   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:10   phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:9    phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:8    phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:7    phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:6    phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:5    phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:4    phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:3    phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:2    phy_reg:0xFFFF
detect_phy:PHY_DETECT_REG:phy_addr:1    phy_reg:0x7949        //等于reg1默认值
detect_phy:Found a valid PHY address:1
detect_phy:PHY_IDENTIFIER_1_REG:phy_reg:0x1C
get_IEEE_phy_speed:phy_identity:0x1C
get_Realtek_phy_speed:Start PHY autonegotiation
get_Realtek_phy_speed:Waiting for PHY to complete autonegotiation.
get_Realtek_phy_speed:autonegotiation complete link speed for phy address 1: 1000
init_emacps:ETH_LINK_UP
DHCP Timeout
Configuring default IP of 192.168.1.199
Board IP: 192.168.1.199
Netmask : 255.255.255.0
Gateway : 192.168.1.1
TCP echo server started @ port 10001