本帖最后由 whl876954091 于 2021-9-11 17:28 编辑
小弟刚接触FPGA,学习了串口后想学学解析串口数据包的方法。网上也找了一些,看后有点儿蒙。哪位大神或者@原子哥 可否指点一下,给个例程看看,有注释的那种
看了个代码,蒙了没看懂:
always @(posedge Clk or negedge Rst_n)
begin
if(!Rst_n) begin
Start_Bit <= 3'd0;
tem_data_byte[0] <= 3'd0;
tem_data_byte[1] <= 3'd0;
tem_data_byte[2] <= 3'd0;
tem_data_byte[3] <= 3'd0;
tem_data_byte[4] <= 3'd0;
tem_data_byte[5] <= 3'd0;
tem_data_byte[6] <= 3'd0;
tem_data_byte[7] <= 3'd0;
Stop_Bit <= 3'd0;
end
else if(bps_clk)
case(bps_cnt)
0: begin
Start_Bit <= 3'd0;
tem_data_byte[0] <= 3'd0;
tem_data_byte[1] <= 3'd0;
tem_data_byte[2] <= 3'd0;
tem_data_byte[3] <= 3'd0;
tem_data_byte[4] <= 3'd0;
tem_data_byte[5] <= 3'd0;
tem_data_byte[6] <= 3'd0;
tem_data_byte[7] <= 3'd0;
Stop_Bit <= 3'd0;
end
6,7,8,9,10,11:Start_Bit <= Start_Bit + reg1_Rs232_Rx;
22,23,24,25,26,27:tem_data_byte[0] <= tem_data_byte[0] + reg1_Rs232_Rx;
38,39,40,41,42,43:tem_data_byte[1] <= tem_data_byte[1] + reg1_Rs232_Rx;
54,55,56,57,58,59:tem_data_byte[2] <= tem_data_byte[2] + reg1_Rs232_Rx;
70,71,72,73,74,75:tem_data_byte[3] <= tem_data_byte[3] + reg1_Rs232_Rx;
86,87,88,89,90,91:tem_data_byte[4] <= tem_data_byte[4] + reg1_Rs232_Rx;
102,103,104,105,106:tem_data_byte[5] <= tem_data_byte[5] + reg1_Rs232_Rx;
118,119,120,121,122:tem_data_byte[6] <= tem_data_byte[6] + reg1_Rs232_Rx;
134,135,136,137,138:tem_data_byte[7] <= tem_data_byte[7] + reg1_Rs232_Rx;
150,151,152,153,154:Stop_Bit <= Stop_Bit + reg1_Rs232_Rx;
default;
endcase
end
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