CSI图像位置不对，帧起始和行起始不管用

tangluo

我是使用6ULL的，寄存器和RT是一样的，图像并不受VSYNC HSYNC控制，只是在HSYNC高电平时有效，VSYNC完全没用，就是图像开始并不是在这两个上升沿起始，因此一幅图本来的零点会随机出现在一整张图的位置
IOMUXC_SetPinMux(IOMUXC_UART1_RX_DATA_CSI_DATA03, 0);
    IOMUXC_SetPinMux(IOMUXC_UART1_CTS_B_CSI_DATA04, 0);
    IOMUXC_SetPinMux(IOMUXC_UART1_TX_DATA_CSI_DATA02, 0);
    IOMUXC_SetPinMux(IOMUXC_UART1_RTS_B_CSI_DATA05, 0);
    IOMUXC_SetPinMux(IOMUXC_UART2_TX_DATA_CSI_DATA06, 0);
    IOMUXC_SetPinMux(IOMUXC_UART2_RX_DATA_CSI_DATA07, 0);
    IOMUXC_SetPinMux(IOMUXC_UART3_TX_DATA_CSI_DATA01, 0);
    IOMUXC_SetPinMux(IOMUXC_UART3_RX_DATA_CSI_DATA00, 0);
    IOMUXC_SetPinMux(IOMUXC_UART2_RTS_B_CSI_DATA09, 0);
    IOMUXC_SetPinMux(IOMUXC_UART2_CTS_B_CSI_DATA08, 0);
    IOMUXC_SetPinMux(IOMUXC_GPIO1_IO08_CSI_VSYNC, 0);
    IOMUXC_SetPinMux(IOMUXC_GPIO1_IO09_CSI_HSYNC, 0);
    IOMUXC_SetPinMux(IOMUXC_GPIO1_IO07_CSI_PIXCLK, 0);
    IOMUXC_SetPinMux(IOMUXC_CSI_MCLK_CSI_MCLK, 0);
    IOMUXC_SetPinConfig(IOMUXC_UART1_RX_DATA_CSI_DATA03, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART1_CTS_B_CSI_DATA04, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART1_TX_DATA_CSI_DATA02, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART1_RTS_B_CSI_DATA05, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART2_TX_DATA_CSI_DATA06, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART2_RX_DATA_CSI_DATA07, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART3_TX_DATA_CSI_DATA01, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART3_RX_DATA_CSI_DATA00, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART2_RTS_B_CSI_DATA09, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_UART2_CTS_B_CSI_DATA08, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO08_CSI_VSYNC, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO09_CSI_HSYNC, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO07_CSI_PIXCLK, 0x100C1);
    IOMUXC_SetPinConfig(IOMUXC_CSI_MCLK_CSI_MCLK, 0x30F9);
    //AXI_CLK
    CCM->CBCDR |= (1 << 6);
    //Gated clock mode
    CSI->CSICR1 |= (1 << 4);
    //External VSYNC
    CSI->CSICR1 |= (1 << 30);
    //8-bit mode
    CSI->CSICR1 &= ~(0 << 0);
#if 1
    //Rx FIFO
    CSI->CSIDMASA_FB1 = (unsigned int)cambuff1;
    CSI->CSIDMASA_FB2 = (unsigned int)cambuff2;
    //camera size
    CSI->CSIIMAG_PARA = (cam_width << 16) | (cam_height << 0);
    //DMA request enable /Rx fifo level 16
    CSI->CSICR3 |= (1 << 12) | (2 << 4);
    //burst type oth rx INCR16
    CSI->CSICR2 |= (3 << 30);
    //FB1&FB2 DMA transfer done interrupt
    CSI->CSICR1 |= (1 << 20) | (1 << 19);
    //reflash
    CSI->CSICR3 |= (1 << 14);
    while (CSI->CSICR3 & (1 << 14))
    {
    }
#endif
    //mask_option 2st
    CSI->CSICR18 |= (2 << 18);
    GIC_EnableIRQ(CSI_IRQn);
    system_register_irqhandler(CSI_IRQn, (system_irq_handler_t)CSI_transfer_done_irqhandler, NULL);
    CSI->CSICR18 |= (1 << 31);