SysTick时钟选择，在一个程序里面看到SysTick时钟源选择的是8分频

changshanzhao · 发表于 2020-4-6 10:49:30

请问 SysTick的时钟源选择的是SysTick_CLKSource_HCLK_Div8当外部晶振挂了，是不是也会自动转到内核时钟

0x00000000 · 发表于 2020-4-6 10:49:31

SysTick就是HCLK或者HCLK/8，HSE挂了CSS会自动切换到HSI运行，所以HCLK就是HSI频率，所以SysTick时钟也就可以确定了。

changshanzhao · 发表于 2020-4-7 16:37:01

0x00000000 发表于 2020-4-6 10:49
SysTick就是HCLK或者HCLK/8，HSE挂了CSS会自动切换到HSI运行，所以HCLK就是HSI频率，所以SysTick时钟也就可 ...

系统时钟选的是PLL，
“HSE故障，外部HSE振荡器被关闭。如果HSE振荡器时钟是用作系统时钟的PLL的输入时钟，PLL也将被关闭。”
那是不是此时切换的HSI就直接作为系统时钟了、没有PLL倍频了，
如果原本是PLL 9倍频得到的72M系统时钟在HSE故障后就变成8M了

0x00000000 · 发表于 2020-4-7 18:20:37

你说的这些其实RM0008号文件都有为什么不先去ST官网看看呢？这么详细的内容不好过你在这里问一万遍？先自助再求助。
Clock Security System can be activated by software. In this case, the clock detector is
enabled after the HSE oscillator startup delay, and disabled when this oscillator is stopped.
If a failure is detected on the HSE clock, the HSE oscillator is automatically disabled, a clock
failure event is sent to the break input of the advanced-control timers (TIM1 and TIM8) and
an interrupt is generated to inform the software about the failure (Clock Security System
Interrupt CSSI), allowing the MCU to perform rescue operations. The CSSI is linked to the
Cortex®-M3 NMI (Non-Maskable Interrupt) exception vector.
Note: Once the CSS is enabled and if the HSE clock fails, the CSS interrupt occurs and an NMI is
automatically generated. The NMI will be executed indefinitely unless the CSS interrupt
pending bit is cleared. As a consequence, in the NMI ISR user must clear the CSS interrupt
by setting the CSSC bit in the Clock interrupt register (RCC_CIR).
If the HSE oscillator is used directly or indirectly as the system clock (indirectly means: it is
used as PLL input clock, and the PLL clock is used as system clock), a detected failure
causes a switch of the system clock to the HSI oscillator and the disabling of the HSE
oscillator. If the HSE clock (divided or not) is the clock entry of the PLL used as system clock
when the failure occurs, the PLL is disabled too.