[FPGA]Can't resolve multiple constant drivers for net!

q1009523480

初学FPGA，小白求助！！

q1009523480

integer cnt1;

always@(posedge clk)
        begin
                if(count==12500) begin count<=0;cnt1<=cnt1+1; end  // 100Hz
                else count<=count+1;
        end

SunML

截个图看下呢

QinQZ

定义的wire类型值，被驱动了多次？

宇智波白

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