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发表于 2017-5-3 17:55:03
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>>但在测试过程中测试很长时间之后就会出现卡死的情况,jlink无法调试
说明低功耗生效了。
27.9.1 Debug support for low-power modes
To enter low-power mode, the instruction WFI or WFE must be executed.
The MCU implements several low-power modes which can either deactivate the CPU clock
or reduce the power of the CPU.
The core does not allow FCLK or HCLK to be turned off during a debug session. As these
are required for the debugger connection, during a debug, they must remain active. The
MCU integrates special means to allow the user to debug software in low-power modes.
For this, the debugger host must first set some debug configuration registers to change the
low-power mode behavior:
• In Sleep mode: FCLK and HCLK are still active. Consequently, this mode does not
impose any restrictions on the standard debug features.
• In Stop/Standby mode, the DBG_STOP bit must be previously set by the debugger.
This enables the internal RC oscillator clock to feed FCLK and HCLK in Stop mode.
When one of the DBG_STANDBY, DBG_STOP and DBG_SLEEP bit is set and the internal
reference voltage is stopped in low-power mode (ULP bit set in PWR_CR register), then the
Fast wakeup must be enabled (FWU bit set in PWR_CR).
For code example, refer to A.18.2: DBG debug in LPM code example. 量产的固件记得去掉调试位,不然功耗下不去。
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